[특허]Hierarchical variable block size address-vector quantization using inter-block correlation

Hierarchical variable block size address-vector quantization using inter-block correlation 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06K-009/36
출원번호	US-0354646 (1989-05-19)
발명자 / 주소	Dixit Sudhir S. (Norwood MA) Feng Yushu (Worcester MA)
출원인 / 주소	GTE Laboratories Incorporated (Waltham MA 02)
인용정보	피인용 횟수 : 53 인용 특허 : 0

초록 ▼

A vector quantization based image compression technique which exploits inter-block correlation and layered addressing structure to form variable block sizes. Without introducing any quality degradation, when compared to the traditional vector quantization algorithms, the invention described herein significantly increases the compression and reduces the bit rate. The concept of inter-block correlation is utilized to form variable size blocks, which are then coded using a hierarchical coding model. The method is based on starting off from a small basic block which is allowed to grow to a maximum of a preset block size as long as certain conditions are met. The basic idea of growing the block is based on the renormalization group theory in physics. The algorithm utilizes only one pixel code book for the basic block size and several address code books for the layer block sizes to encode an image. S/N ratio in excess of 30 dB at bit rates lower than 0.2 bpp are easily obtained.

대표청구항 ▼

A method of compressing and reconstructing an image by a hierarchial variable block-size address-vector quantization, comprising the steps of: partitioning an image into basic blocks of equal size to form a first layer of blocks, each basic block having the same number of pixels; constructing a first layer pixel vector code book having a plurality of addressable entries, each entry representing a combination of elements which have appeared frequently in individual blocks of previously coded images; combining groups of adjacent basic blocks of said first layer to form a second layer of blocks; constructing an address code book for said second layer blocks having a plurality of addressable entries wherein said entries are addresses of combinations of code vectors in said first layer code book which have the highest probability of occurrence; determining a maximum block size and the number of layers N required to encode a maximum size block; if N≥2. combining groups of adjacent blocks from layer i-l to form a layer i block, where 1

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Hierarchical variable block size address-vector quantization using inter-block correlation 원문보기

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Hierarchical variable block size address-vector quantization using inter-block correlation 원문보기

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