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| 국가/구분 | United States(US) Patent 등록 |
|---|---|
| 국제특허분류(IPC7판) |
|
| 출원번호 | US-0586758 (1990-09-24) |
| 발명자 / 주소 |
|
| 출원인 / 주소 |
|
| 인용정보 | 피인용 횟수 : 647 인용 특허 : 0 |
A semiconductor chip assembly is mounted to contact pads in a compact area array. An interposer is disposed between the chip and the substrate. The contacts on the chip are connected to terminals on the interposer by flexible leads extending through apertures in the interposer. The terminals on the
A semiconductor chip assembly is mounted to contact pads in a compact area array. An interposer is disposed between the chip and the substrate. The contacts on the chip are connected to terminals on the interposer by flexible leads extending through apertures in the interposer. The terminals on the interposer in turn are bonded to the contact pads on the substrate. Flexibility of the leads permits relative movement of the contacts on the chip relative to the terminals and the contact pads of the substrate and hence relieves the stresses caused by differential thermal expansion. The arrangement provides a compact structure similar to that achieved through flip-chip bonding, but with markedly increased resistance to thermal cycling damage.
A semiconductor chip assembly comprising: (a) a semiconductor chip having a front surface and a plurality of contacts disposed in a pattern on said front surface, said pattern encompassing a contact pattern area on said front surface; (b) a sheetlike dielectric interposer overlying said front surfac
A semiconductor chip assembly comprising: (a) a semiconductor chip having a front surface and a plurality of contacts disposed in a pattern on said front surface, said pattern encompassing a contact pattern area on said front surface; (b) a sheetlike dielectric interposer overlying said front surface of said chip, said interposer having a first surface facing toward said chip and a second surface facing away from said chip, an area of said interposer overlying said contact pattern area of said chip, said interposer having apertures extending from said first surface to said second surface; (c) a plurality of terminals disposed in a pattern on said second surface of said interposer, at least some of said terminals being disposed in said area of said interposer overlying said contact pattern area, each such terminal being associated with one of said contacts on said chip; and (d) a flexible conductive lead extending between each said terminal and the associated one of said contacts, each such lead extending through one of said apertures, each said lead having a contact end connected to the associated contact and a terminal end connected to the associated terminal, said terminals being moveable relative to the contact ends of said leads so as to compensate for thermal expansion of said chip.
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