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Cache affinity scheduler 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-012/00
  • G06F-015/16
출원번호 US-0747658 (1991-08-19)
발명자 / 주소
  • Valencia Andrew J. (Portland OR)
출원인 / 주소
  • Sequent Computer Systems, Inc. (Beaverton OR 02)
인용정보 피인용 횟수 : 77  인용 특허 : 0

초록

A computing system (50) includes N number of symmetrical computing engines having N number of cache memories joined by a system bus (12). The computing system includes a global run queue (54), an FPA global run queue, and N number of affinity run queues (58). Each engine is associated with one affin

대표청구항

A computing system, comprising: multiple computing engines that run processes, the multiple computing engines being associated with respective cache memories and respective affinity run queues; cache context estimating means for estimating an amount of cache context of a particular one of the cache

이 특허를 인용한 특허 (77)

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  30. Saltzstein William E. ; Sabri Mohamed ; Dobaj Anthony P. ; Baumann Eric O., Medical patient vital signs-monitoring apparatus.
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  32. Brenner,Larry Bert; Browning,Luke Matthew, Method for determining idle processor load balancing in a multiple processors system.
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  62. Li Shih-Gong (Austin TX), Selecting buckets for redistributing data between nodes in a parallel database in the incremental mode.
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  67. Hansen, Craig; Moussouris, John; Massalin, Alexia, System and methods for expandably wide processor instructions.
  68. Hansen, Craig; Moussouris, John; Massalin, Alexia, System and methods for expandably wide processor instructions.
  69. Brenner,Larry Bert; Browning,Luke Matthew, System for preventing periodic load balancing if processor associated with lightest local run queue has benefited from idle processor load balancing within a determined time period.
  70. Takada, Aritoki, Systems and methods for managing public and private queues for a storage system.
  71. Brokenshire,Daniel Alan; Day,Michael Norman; Minor,Barry L; Nutter,Mark Richard; To,VanDung Dang, Task queue management of virtual devices using a plurality of processors.
  72. McKenney, Paul E.; Krueger, Phillip E., Using hardware counters to estimate cache warmth for process/thread schedulers.
  73. Brokenshire,Daniel Alan; Day,Michael Norman; Minor,Barry L; Nutter,Mark Richard, Virtual devices using a pluarlity of processors.
  74. Brokenshire, Daniel Alan; Day, Michael Norman; Minor, Barry L; Nutter, Mark Richard, Virtual devices using a plurality of processors.
  75. Saltzstein William E. ; Sabri Mohamed ; Burkhart Scott M. ; Semler Gregory T., Vital signs monitor.
  76. Saltzstein William E. ; Sabri Mohamed ; Burkhart Scott M. ; Semler Gregory T., Vital signs monitoring unit.
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