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Forming via holes in a multilevel substrate in a single step 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-003/00
  • H05K-013/00
출원번호 US-0735572 (1991-07-25)
발명자 / 주소
  • Kumar Nalin (Austin TX)
출원인 / 주소
  • Microelectronics And Computer Technology Corporation (Austin TX 02)
인용정보 피인용 횟수 : 97  인용 특허 : 0

초록 ▼

A method for forming via holes in a multilayer structure in a single step. The invention includes disposing over a base a first layer comprising first metal lines beneath a first dielectric, disposing over the first layer a second layer comprising second metal lines beneath a second dielectric such

대표청구항 ▼

A method of forming every via hole in a multilevel substrate in a single step, comprising: disposing over a base a first layer comprising first metal lines beneath a first dielectric; disposing over the first layer a second layer comprising second metal lines beneath a second dielectric such that po

이 특허를 인용한 특허 (97)

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