[특허]Semiconductor package having programmable interconnect

Semiconductor package having programmable interconnect 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-023/48 H01L-029/40
출원번호	US-0921806 (1992-07-29)
발명자 / 주소	Rostoker Michael D. (San Jose CA) Chang Yin (Berkeley CA)
출원인 / 주소	LSI Logic Corporation (Milpitas CA 02)
인용정보	피인용 횟수 : 48 인용 특허 : 0

초록 ▼

A semiconductor package is described which has external connection points (pins, pads, etc.) which may be configured from outside of the package. In one embodiment, this is accomplished with programming holes which pass through and form contact surfaces with various conductors within the package. Conductive material is then deposited into selected holes, forming connections between all of the contact surfaces in any hole. In another embodiment, configurability is accomplished via conductive pads disposed on the exterior surface of the package. Conductive jumpers are then used to connect selected pads. An auxiliary externally effected power plane and bus-bar structure are also described.

대표청구항 ▼

A configurable semiconductor package allowing a user to direct signals from a die within the package to selected terminals disposed on an exterior surface of the package, comprising: a multi-layer package body having alternating at least one layer each of conductive traces and insulating material, and having terminals disposed on a first exterior surface of the package body; wherein: a first of the alternating layers is a layer of conductive traces within the package body, and has points at the ends of the first conductive traces for connecting to a semiconductor die mounted in an opening within the package body; a second of the alternating layers is a layer of second conductive traces within the package body; a third of the alternating layers is a layer of insulating material within the package body separating the first layer from the second layer; further comprising: conductive vias disposed within the package body and extending between the second conductive traces and the terminals; holes extending from a second exterior surface of the package, opposite the first exterior surface of the package body, extending into the package body, and communicating with corresponding ones of the first and second conductive traces of the first and second layer, respectively; means, disposed in the holes, within the package body, for configurably connecting selected ones of the first conductive traces to selected ones of the second conductive traces in order that a user may direct signals between a selected one of the die-connecting points and a selected one of the package terminals.

이 특허를 인용한 특허 (48)

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Liberkowski Janusz B. (5884 Macadam Ct. San Jose CA 95123), Lattice interconnect method and apparatus for manufacturing multi-chip modules.
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Narita Kaoru,JPX ; Fujii Takeo,JPX, MOSFET for input/output protective circuit having a multi-layered contact structure with multiple contact holes on a si.
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Lan James J. D. ; Chiang Steve S. ; Shepherd William H. ; Wu Paul Y. F. ; Xie John Y., Method and structure to interconnect traces of two conductive layers in a printed circuit board.
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Schoenfeld,Aaron M.; Corisis,David J.; Gomm,Tyler J., Method for fabricating a semiconductor component.
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Schoenfeld,Aaron M.; Corisis,David J.; Gomm,Tyler J., Method for fabricating semiconductor component with adjustment circuitry for electrical characteristics or input/output configuration.
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Gazdzinski, Robert F., Methods of processing data obtained from medical device.
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Evans Stephen ; Martel Anthony Paul, Multiple layer electrical interface.
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Davis Benjamin R. ; DeLong Ronald V., Programming system for semiconductor devices and method therefor.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
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메일정보	받는사람 (필수) @ 보내는사람 (선택) @ 제목 내용 KISTI 검색결과 이메일 서비스
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연합인증

Semiconductor package having programmable interconnect 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

이 특허를 인용한 특허 (48)

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연합인증

Semiconductor package having programmable interconnect 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

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이 특허를 인용한 특허 (48)

관련 콘텐츠

특허 원문 보기

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