이 특허를 인용한 특허 (47)

1. Kim, Sung-Min; Yun, Eun-Jung; Kim, Dong-Won; Yoon, Jae-Man, 3-Dimensional flash memory device and method of fabricating the same.

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2. Kim,Sung Min; Yun,Eun Jung; Kim,Dong Won; Yoon,Jae Man, 3-Dimensional flash memory device and method of fabricating the same.

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3. Parekh Kunal R., Bitline contact structures and DRAM array structures.

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4. Cho Seok Won,KRX, Bottom-gated cylindrical-shaped thin film transistor having a peripheral offset spacer.

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5. Parekh Kunal R. ; Zahurak John K., Capacitor structures, DRAM cell structures, and integrated circuitry.

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6. Kunal R. Parekh ; John K. Zahurak, Capacitor structures, DRAM cell structures, and integrated circuitry, and methods of forming capacitor structures, integrated circuitry and DRAM cell structures.

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7. Parekh Kunal R. ; Zahurak John K., Capacitor structures, DRAM cell structures, and integrated circuitry, and methods of forming capacitor structures, integrated circuitry and DRAM cell structures.

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8. Parekh,Kunal R.; Zahurak,John K., Capacitor structures, DRAM cell structures, and integrated circuitry, and methods of forming capacitor structures, integrated circuitry and DRAM cell structures.

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9. Liu Yauh-Ching ; Kao David Y., Capacitor structures, DRAM cell structures, methods of forming capacitors, methods of forming DRAM cells, and integrate.

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10. Liu Yauh-Ching ; Kao David Y., Capacitor structures, DRAM cell structures, methods of forming capacitors, methods of forming DRAM cells, and integrated circuits incorporating capacitor structures and DRAM cell structures.

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11. Liu Yauh-Ching ; Kao David Y., Capacitor structures, DRAM cell structures, methods of forming capacitors, methods of forming DRAM cells, and integrated circuits incorporating capacitor structures and DRAM cell structures.

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12. Parekh Kunal R. ; Zahurak John K., Capacitor structures, DRAM cells and integrated circuitry.

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13. Parekh Kunal R., Conductive electrical contacts, capacitors, DRAMs, and integrated circuitry, and methods of forming conductive electrical contacts, capacitors, DRAMs and integrated circuitry.

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14. Parekh Kunal R., Conductive electrical contacts, capacitors, DRAMs, and integrated circuitry, and methods of forming conductive electrical contacts, capacitors, DRAMs, and integrated circuitry.

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15. Kunal R. Parekh ; John K. Zahurak, DRAM cells and integrated circuitry, and capacitor structures.

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16. Chan Tsiu C. ; Han Yu-Pin ; Guritz Elmer H., Field effect device with polycrystalline silicon channel.

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17. Parekh Kunal R. ; Parekh Angela S., Integrated circuitry, DRAM cells, capacitors, and methods of forming integrated circuitry, DRAM cells and capacitors.

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18. Chan Tsiu Chiu ; Han Yu-Pin ; Guritz Elmer H. ; Blanchard Richard A., Inverted field-effect device with polycrystalline silicon/germanium channel.

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19. Lin Horng-Chih (Hsinchu TWX) Chen Liang-Po (Hsinchu TWX) Lin Hsiao-Yi (Hualien Hsien TWX) Chang Chun-Yen (Hsinchu TWX), Method for fabricating thin-film transistor with bottom-gate or dual-gate configuration.

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20. Yamazaki, Shunpei; Koyama, Jun, Method for manufacturing an electrooptical device.

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21. Choi Jong Moon,KRX ; Kim Jong Kwan,KRX, Method of making a thin film transistor.

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22. Kunal R. Parekh ; John K. Zahurak, Methods of forming a capacitor and methods of forming a monolithic integrated circuit.

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23. Parekh, Kunal R.; Zahurak, John K., Methods of forming capacitor structures and DRAM arrays.

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24. Parekh Kunal R. ; Zahurak John K., Methods of forming capacitors and DRAM arrays.

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25. Parekh Kunal R. ; Zahurak John K., Methods of forming capacitors and DRAM arrays.

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26. Liu Yauh-Ching ; Kao David Y., Methods of forming capacitors methods of forming DRAM cells, and integrated circuits incorporating structures and DRAM cell structures.

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27. Parekh Kunal R. ; Zahurak John K., Methods of forming capacitors structures and DRAM cells.

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28. Parekh Kunal R. ; Parekh Angela S., Methods of forming integrated circuitry, DRAM cells and capacitors.

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29. Manning, Monte, Methods of forming thin film transistors.

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30. Liu, Zheng; Long, Chunping; Chan, Yu-Cheng; Lu, Xiaoyong; Li, Xialong, Polycrystalline silicon thin-film transistor.

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31. Zhang Jiong,SGX ; Shao Kai,SGX ; Chu Shao-Fu Sanford,SGX, Process to control the lateral doping profile of an implanted channel region.

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32. Chan Tsiu Chiu ; Bryant Frank Randolph, SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers.

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33. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.

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34. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.

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35. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.

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36. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.

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37. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device and fabrication method thereof.

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38. Yamazaki, Shunpei; Arai, Yasuyuki; Koyama, Jun, Semiconductor device comprising a pixel unit including an auxiliary capacitor.

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39. Ino Masumitsu,JPX ; Maekawa Toshikazu,JPX ; Tashiro Yuki,JPX ; Shimogaichi Yasushi,JPX ; Morita Shintaro,JPX, Semiconductor device for driving a substrate of an electro-optical device.

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40. Yamazaki, Shunpei; Koyama, Jun, Semiconductor device having a gate wiring comprising laminated wirings.

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41. Balasinski, Artur P.; Huang, Kuei-Wu, Spacer-type thin-film polysilicon transistor for low-power memory devices.

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42. Krivokapic, Zoran, Straddled gate FDSOI device.

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43. Manning, Monte, Thin film transistor.

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44. Seok Won Cho KR, Thin film transistor and method for fabricating the same.

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45. Manning Monte, Thin film transistors.

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46. Manning Monte, Thin film transistors.

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47. Nelson, Shelby F.; Tutt, Lee W., Vertical transistor having reduced parasitic capacitance.

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