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Method of manufacturing circuit board and circuit board itself manufactured by said method

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-001/00
출원번호 US-0959618 (1992-10-13)
우선권정보 JP-0169918 (1990-06-29)
발명자 / 주소
  • Ueno Fumio (Yokohama JPX) Kasori Mitsuo (Kawasaki JPX) Goto Yoshiko (Tokyo JPX) Horiguchi Akihiro (Kawasaki JPX)
출원인 / 주소
  • Kabushiki Kaisha Toshiba (Kawasaki JPX 03)
인용정보 피인용 횟수 : 15  인용 특허 : 12

초록

Disclosed is a method of manufacturing a circuit board comprising an insulating substrate and a conductor pattern of a low resistivity which can be prevented from being peeled off the substrate by a thermal stress. The method comprises the step of forming an insulating layer on an insulating substra

대표청구항

A circuit board comprising: an insulating substrate having a groove shaped like a conductor pattern which is to be formed later; and a conductor pattern formed in said groove of said substrate, said conductor pattern containing as a main component an electrically conductive metal selected from the g

이 특허에 인용된 특허 (12)

  1. Horiguchi Akihiro (Yokohama JPX) Kasori Mituo (Kawasaki JPX) Ueno Fumio (Kawasaki JPX) Sato Hideki (Yokohama JPX) Mizunoya Nobuyuki (Yokohama JPX) Endo Mitsuyoshi (Yamato JPX) Tanaka Shun-ichiro (Yok, Aluminum nitride sintered body having conductive metallized layer.
  2. Iwase Nobuo (Kamakura JPX) Anzai Kazuo (Tokyo JPX) Shinozaki Kazuo (Inagi JPX) Tsuge Akihiko (Yokohama JPX) Saitoh Kazutaka (Kawasaki JPX) Iyogi Kiyoshi (Tokyo JPX) Sato Noboru (Yokohama JPX) Kasori , Circuit substrate having high thermal conductivity.
  3. Aldinger Fritz (Rodenbach DEX) Keilberth Richard (Kleinheubach DEX) Werdecker Waltraud (Hanau DEX), Combination of AlN-Y2O3 heat conductive ceramic substrate and electronic component.
  4. Gardner Robert D. (Northfield OH) Rhoads Kathleen M. (Seville OH) Babuder Raymond F. (Fairview Park OH), Copper conductive composition for use on aluminum nitride substrate.
  5. Nicolas Gerard (Grenoble FR), Method of connecting electronic microcomponents.
  6. Iannuzzi Giulio (Milan ITX) deMartiis Carlo C. (Milan ITX) Del Bo Vittorio (Monza ITX) Gandolfi Luciano (Corsico ITX), Method of connecting semiconductor structure to external circuits.
  7. Okada Yoshitsugu (Tokyo JPX), Method of manufacturing multi-layered wiring substrate.
  8. Leroux Adrien (Sherbrooke CA) Kocsis Alexandre (Sherbrooke NY CA) Lane George D. (Muncy NY), Multilayer thick-film hybrid circuits method and process for constructing same.
  9. Ushifusa Nobuyuki (Hitachi JPX) Ogihara Satoru (Hitachi JPX) Noro Takanobu (Yokohama JPX), Multilayered ceramic circuit board.
  10. Amendola, Albert; Schmeckenbecher, Arnold F.; Sobon, Joseph T., Process for forming a pattern of metallurgy on the top of a ceramic substrate.
  11. Kondo Kazuo (Aichi JPX) Sukegawa Tsuneyuki (Aichi JPX), Substrate for an integrated circuit.
  12. Beil Martin (Munich DT), Thick-film circuit on a substrate with through-contacts between conductor paths on opposite sides of the substrate.

이 특허를 인용한 특허 (15)

  1. Makino, Yusuke; Takashima, Tsuneaki, Ceramic member for bonding, process for producing the same, vacuum switch, and vacuum vessel.
  2. Horiguchi Akihiro,JPX ; Sumino Hiroyasu,JPX ; Kasori Mitsuo,JPX ; Ueno Fumio,JPX, Circuit board with high strength and high reliability and process for preparing the same.
  3. Daoud Bassel Hage, Grooved paths for printed wiring board with obstructions.
  4. Yun, Sang Kyeong; Kim, Dong Hoon; Park, Sung June, Manufacturing method of ceramic device using mixture with photosensitive resin.
  5. Maekawa,Shinji, Method for manufacturing thin film transistor in display device.
  6. Fukunaga, Akira; Nagasawa, Hiroshi, Method for mounting semiconductor device.
  7. Rottenberg, Xavier; Ekkels, Phillip; Tilmans, Hendrikus; De Raedt, Walter, Method for the production of planar structures.
  8. Mukai, Kiyohito; Tanimoto, Tadashi; Ito, Mitsumi, Method of fabricating a semiconductor device and a method of generating a mask pattern.
  9. Mukai,Kiyohito; Tanimoto,Tadashi; Ito,Mitsumi, Method of fabricating a semiconductor device and a method of generating a mask pattern.
  10. Abe Tomoyuki,JPX, Method of manufacturing multilayer circuit substrate.
  11. Abe Tomoyuki,JPX, Method of manufacturing multilayer circuit substrate.
  12. Ogure, Naoaki, Substrate coated with a conductive layer and manufacturing method thereof.
  13. Dunaway Thomas J. ; Spielberger Richard K., Test and tear-away bond pad design.
  14. Maekawa, Shinji, Thin film transistor and display device.
  15. Nagase, Kenji; Kawabata, Kenichi, Wiring structure of printed wiring board and method for manufacturing the same.

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