초록 ▼

The present invention discloses a semiconductor output circuit with temperature compensated noise control. The output circuit of the present invention presents an increase in speed, a reduction in power consumption, and a reduction in noise level as compared with the prior art temperature compensate

The present invention discloses a semiconductor output circuit with temperature compensated noise control. The output circuit of the present invention presents an increase in speed, a reduction in power consumption, and a reduction in noise level as compared with the prior art temperature compensated noise control output circuits. These advantages are obtained by utilizing the present invention\s current control means which current control means is driven by a temperature compensation circuit.

대표청구항 ▼

A semiconductor circuit comprising: an output, a first transistor means for driving said output, a second transistor means for driving said first transistor means, a generator for generating a reference voltage electrically connected to said second transistor means, an input for receiving electrical

A semiconductor circuit comprising: an output, a first transistor means for driving said output, a second transistor means for driving said first transistor means, a generator for generating a reference voltage electrically connected to said second transistor means, an input for receiving electrical signals and for driving said second transistor means; said first transistor means including a first driver transistor for driving said output to the supply voltage, and a second driver transistor for driving said output to ground; said transistor means including a first pre-driver circuit for driving said first driver transistor, and a second pre-driver circuit for driving said second driver transistor; said first pre-driver circuit including a first current control transistor and a first inverter, said first current control transistor being connected in series between said first inverter and the supply voltage; said input driving said first inverter; said reference voltage driving said first current control transistor so as to vary the resistivity of said first current control transistor in response to variations in said reference voltage, so as to cause said first current control transistor to vary the switching time of said first inverter in response to variations in said reference voltage; said second pre-driver circuit including a second current control transistor and a second inverter, said second current control transistor being connected in series between said second inverter and the supply voltage; said input driving said second inverter; said reference voltage driving said second current control transistor so as to vary the resistivity of said second current control transistor in response to variations in said reference voltage so as to cause said second current control transistor to vary the switching time of said second inverter in response to variations in said reference voltage; said generator generating said reference voltage by means of a temperature compensation circuit, said temperature compensation circuit causing said reference voltage to vary in response to variations of the ambient temperature; said temperature compensation circuit includes a reference current generation branch and a reference voltage generation branch; said reference current generation branch includes a resistor connecting the supply voltage and the drain of a first pull-down transistor, said first pull-down transistor having its source connected to ground, the gate of said first pull-down transistor being connected to a voltage above the threshold voltage of said first pull-down transistor, said reference voltage generation branch includes a second pull-down transistor, said gate of said second pull-down transistor being driven by said drain of said first pull-down transistor, said source of said pull-down transistor being connected to ground, said drain of said second pull-down transistor being connected to the drain of a pull-up transistor, the source of said pull-up transistor being connected to the supply voltage, the gate of said pull-up transistor being connected to said drain of said pull-up transistor; said drain of said pull-up transistor generating said reference voltage; and said output varying in response to corresponding variations of said input, and said output switching time varying in response to variations in said switching time of said first and said second inverters of said first and second respective pre-drivers.