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Plasma etching apparatus with conductive means for inhibiting arcing 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/00
출원번호 US-0819573 (1992-01-08)
발명자 / 주소
  • Lee Terrance Y. (Oakland CA) Redeker Fred C. (Fremont CA) Nitescu Petru N. (Fremont CA) Steger Robert J. (San Jose CA) Groechel David W. (Sunnyvale CA) Sherstinsky Semyon (San Francisco CA) Shendon M
출원인 / 주소
  • Applied Materials, Inc. (Santa Clara CA 02)
인용정보 피인용 횟수 : 56  인용 특허 : 0

초록 ▼

An improved plasma etching apparatus is disclosed for the plasma etching of semiconductor wafers. The improvement includes conductive means for inhibiting arcing from electrical charges accumulating on one or more non-conductive protective surfaces on members at rf potential within the apparatus, su

대표청구항 ▼

A method for plasma etching a semiconductor wafer without damaging said wafer by arcing from charge buildup on one or more insulation surfaces adjacent said wafer which comprises etching said wafer in a plasma etching apparatus having a plurality of conductive plug means for inhibiting arcing from e

이 특허를 인용한 특허 (56)

  1. Cheung, Jeff S.; Demos, Alexandros T., Apparatus and process for controlling the temperature of a substrate in a plasma reactor.
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  2. Jeff S. Cheung ; Alexandros T. Demos, Apparatus and process for controlling the temperature of a substrate in a plasma reactor chamber.
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  3. Lu Wen-Chuan,TWX ; Lu Chung-Chien,TWX ; Chou Chih-Houng,TWX ; Lin Gary,TWX, Apparatus for preventing plasma etching of a wafer clamp in semiconductor fabrication processes.
    상세보기
  4. Ashjaee,Jalal; Nagorski,Boguslaw; Basol,Bulent M.; Talieh,Homayoun; Uzoh,Cyprian, Apparatus for processing surface of workpiece with small electrodes and surface contacts.
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  5. Ma, Shawming; Straube, Ralph H M, Conductive collar surrounding semiconductor workpiece in plasma chamber.
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  6. Fischer, Andreas, Confined plasma with adjustable electrode area ratio.
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  7. Thomas E. Wicker ; Alan M. Schoepp ; Robert A. Maraschin, Contamination controlling method and apparatus for a plasma processing chamber.
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  8. Phan Tony T. ; Goodwin Tom J. ; Lowell John K., Device for reducing plasma etch damage and method for manufacturing same.
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  9. Almgren Carl W., Electrode assembly for plasma reactor.
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  10. Maraschin Robert ; Shufflebotham Paul Kevin ; Barnes Michael Scott, Electrostatic clamp with lip seal for clamping substrates.
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  11. Yuan, Jie; Sun, Jennifer Y.; Duan, Renguan, Erosion resistance enhanced quartz used in plasma etch chamber.
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  12. Tam Simon W. ; Sherstinsky Semyon ; Chang Mei ; Morrison Alan ; Sinha Ashok, Etch chamber.
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  13. Tam Simon W. ; Sherstinsky Semyon ; Chang Mei ; Morrison Alan ; Sinha Ashok, Etch chamber.
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  14. Dhindsa, Rajinder; Kadkhodayan, Bobby, Etch rate uniformity.
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  15. Benzing, David W.; Kadkhodayan, Babak, Hollow anode plasma reactor and method.
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  16. Benzing, David W.; Kadkhodayan, Babak, Hollow anode plasma reactor and method.
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  17. McMillin, Brian; Sato, Arthur; Benjamin, Neil, Hybrid edge ring for plasma wafer processing.
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  18. Ma, Ching-Hui; Chen, Chao-Cheng; Wu, Tsang-Jiuh; Yu, Hui-Chang; Tao, Hun-Jan, In-situ discharge to avoid arcing during plasma etch processes.
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  19. Shan Hongching ; Lindley Roger ; Bjorkman Claes ; Qian Xue Yu ; Plavidal Richard ; Pu Bryan ; Ding Ji ; Li Zongyu ; Ke Kuang-Han ; Welch Michael, Magnetically-enhanced plasma chamber with non-uniform magnetic field.
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  20. Basol, Bulent M., Method for controlling conductor deposition on predetermined portions of a wafer.
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  21. Bedell, Stephen W.; Fogel, Keith E.; Hekmatshoartabari, Bahman; Lauro, Paul A.; Sadana, Devendra K.; Shahrjerdi, Davood, Method for facilitating crack initiation during controlled substrate spalling.
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  22. Uwe Seidel DE; Rainer Braun DE, Method for preventing redeposition of etching products onto substrate surfaces during a tungsten re-etching process in the production of LSI circuits.
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  23. Leiphart Shane P. ; Burton Randle D., Method for reducing surface charge on semiconducter wafers to prevent arcing during plasma deposition.
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  24. Leiphart Shane P. ; Burton Randle D., Method for reducing surface charge on semiconductor wafers to prevent arcing during plasma deposition.
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  25. Jalal Ashjaee ; Boguslaw A. Nagorski ; Bulent M. Basol ; Homayoun Talieh ; Cyprian Uzoh, Method of and apparatus for making electrical contact to wafer surface for full-face electroplating or electropolishing.
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  26. Kenney, Mark D., Perimeter seal for backside cooling of substrates.
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  27. Mayer, Steven T.; Drewery, John Stephen; Webb, Eric G., Photoresist-free metal deposition.
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  28. Roderick Craig A. ; Grimard Dennis S., Plasma chamber support having an electrically coupled collar ring.
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  29. Shamouil Shamouilian ; Jon M. McChesney ; Kwok Manus Wong ; Liang-Guo Wang ; Alexander M. Veytser ; Dennis S. Grimard, Plasma chamber support with coupled electrode.
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  30. Lee Ray C.,TWX ; Ting Mu-Tsun,TWX ; Hsiao Jen-Hui,TWX ; Chen Troy,TWX, Plasma chamber wafer clamping ring with erosion resistive tips.
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  31. Basol, Bulent M., Plating methods for low aspect ratio cavities.
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  32. Masterson, Sean, Pre-clean chamber.
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  33. Ishikawa Tetsuya ; Krishnaraj Padmanabhan ; Niazi Kaveh ; Hanawa Hiroji, Process kit.
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  34. Rocha-Alvarez, Juan Carlos; Chen, Chen-An; Yieh, Ellie; Venkataraman, Shankar, Purge heater design and process development for the improvement of low k film properties.
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  35. Tanaka Yoichiro (Narita JPX) Taoka Megumi (Narita JPX) Cohen Barney (Santa Clara CA), R.F. plasma reactor with larger-than-wafer pedestal conductor.
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  36. Shamoun, Bassam, RF powered target for increasing deposition uniformity in sputtering systems.
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  39. Bosch, William Frederick, Semiconductor processing equipment having improved particle performance.
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  40. Bosch, William Frederick, Semiconductor processing equipment having improved particle performance.
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  42. Wicker, Thomas E., Semiconductor processing equipment having improved process drift control.
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  43. Wicker, Thomas E., Semiconductor processing equipment having improved process drift control.
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  45. William S. Kennedy ; Robert A. Maraschin ; Jerome S. Hubacek, Semiconductor processing equipment having tiled ceramic liner.
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  46. Marohl Dan A. ; Rosenstein Michael, Semiconductor wafer alignment member and clamp ring.
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  47. Ke Kuang-Han ; Pu Bryan Y. ; Shan Hongching ; Wang James ; Fong Henry ; Li Zongyu ; Welch Michael D., Shield or ring surrounding semiconductor workpiece in plasma chamber.
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  48. Ke, Kuang-Han; Pu, Bryan Y.; Shan, Hongching; Wang, James; Fong, Henry; Li, Zongyu; Welch, Michael D., Shield or ring surrounding semiconductor workpiece in plasma chamber.
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  49. Bedell, Stephen W.; Fogel, Keith E.; Lauro, Paul A.; Sadana, Devendra K., Substrate holder assembly for controlled layer transfer.
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  50. Semyon Sherstinsky ; Calvin Augason ; Leonel A. Zuniga ; Jun Zhao ; Talex Sajoto ; Leonid Selyutin ; Joseph Yudovsky ; Maitreyee Mahajani ; Steve G. Ghanayem ; Tai T. Ngo ; Arnold Kholodenk, Substrate support member for a processing chamber.
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  51. Tong, Jose; Lenz, Eric H., Techniques for reducing arcing-related damage in a clamping ring of a plasma processing system.
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  52. Tong,Jose; Lenz,Eric H., Techniques for reducing arcing-related damage in a clamping ring of a plasma processing system.
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  53. Yao Tse-Yong ; Thompson Allen ; Ding Peijun ; Hong Richard, Use of tapered shadow clamp ring to provide improved physical vapor deposition system.
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  54. Bichler, Hermann; Hanzlik, Reinhard; Fries, Stefan; Mueller, Frank; Wachinger, Heinrich, Wafer clamp assembly for holding a wafer during a deposition process.
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  55. Theodore H. Smick ; Geoffrey Ryding ; Bernhard F. Cordts, III ; Robert S. Andrews, Wafer holder for simox processing.
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  56. Arnold Kimberley J. ; Lewis John W. ; Pinto James N., Wafer lift assembly.
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