[특허]Master slice semiconductor integrated circuit with output drive current control

Master slice semiconductor integrated circuit with output drive current control 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H03K-017/16
출원번호	US-0838460 (1992-05-07)
우선권정보	JP-0191215 (1990-07-19); JP-0191216 (1990-07-19); JP-0191217 (1990-07-19); JP-0191218 (1990-07-19); JP-0191219 (1990-07-19); JP-0191220 (1990-07-19)
국제출원번호	PCT/JP91/00975 (1991-07-18)
§371/§102 date	992May71 (992May71)
국제공개번호	WO-9202052 (1992-02-06)
발명자 / 주소	Hirabayashi Yasuhisa (Suwa JPX) Oguchi Yasuhiro (Suwa JPX) Ookawa Kazuhiko (Suwa JPX) Sakuda Takashi (Suwa JPX)
출원인 / 주소	Seiko Epson Corporation (Tokyo JPX 03)
인용정보	피인용 횟수 : 17 인용 특허 : 0

초록 ▼

An output current varying circuit 10 includes a control signal generating circuit 12, an output current supplying circuit 14 and an output terminal 16. Circuit 12 receives an output signal Sout of a dedicated logic circuit 11, and an output signal S1 from a predetermined circuit or an external signal S2 from an input terminal 13, and generates first and second control signals C1 and C2. Circuit 14 is constituted by two P-channel MIS transistors Tr1 and Tr2 connected in parallel between high potential Vdd and output terminal 16. When output signal Sout from logic circuit 11 is at H level, transistor Tr2 is in an on state and an output current i at H level appears on output terminal 16. When output signal Sout is a L level and a current value changing signal S is at L level, transistors Tr1 and Tr2 are both in an off state and the output current is zero. When output signal Sout is at L level and signal S is at H level, transistors Tr1 and Tr2 are both in the off state and an output current 2i at H level appears. Thus, the current value of an external Xout supplied to output terminal 16 can be selectively set at i or 2i, so that power consumption can be reduced and flexibility in high power driving can be obtained depending on the environment where the chip is used.

대표청구항 ▼

A master slice semiconductor integrated circuit comprising: a chip; a logic circuit formed from a plurality of basic cells composed of a plurality of transistors on said chip, said logic circuit providing an output signal; means for providing a current value changing signal; a power source line providing a power source potential and an output line with an output terminal on said chip; control signal generating means connected to receive the output signal and the current value changing signal for performing a logical operation on the output signal and the current value changing signal in order to produce control signals; and a current supplying means having at least two current paths connected in parallel between said power source line and said output line, said current supplying means being connected to receive the control signals so that each current path is opened or closed by a respective control signal, wherein the output signal and the current value changing signal are binary logic signals each controllable to have a selected one of a first signal value and a second signal value, and said control signal generating means comprise logic means for producing control signals which cause the current supplying means to supply a current having a first non-zero current value when the output signal has said first signal value, independently of the value of the current value changing signal, and to supply a current having a selected one of second and third current values, each different from the first current value dependent on the signal value of the current value changing signal when the output signal has said second signal value.

이 특허를 인용한 특허 (17)

Frank Gasparik, Compensating for initial signal interference exhibited by differential transmission lines.
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Ali,Anwar; Beatty,Julie; Doddapaneni,Kalyan, Disabling unused IO resources in platform-based integrated circuits.
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David J. Klein ; Prashant Shamarao, Integrated circuit output buffers having control circuits therein that utilize output signal feedback to control pull-up and pull-down time intervals.
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Shamarao Prashant, Integrated circuit output buffers having feedback switches therein for reducing simultaneous switching noise and improving impedance matching characteristics.
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Shamarao Prashant, Integrated circuit output buffers having low propagation delay and improved noise characteristics.
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Chrappan Francesco,ITX ; Nessi Maurizio,ITX ; Salina Alberto,ITX, Integrated unit gain output stage.
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Chan Francis H., Method of controlling transmission of binary pulses on a transmission line.
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Gallo, Girolamo; Marotta, Giulio; Naso, Giovanni, Output buffer strength trimming.
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Gallo,Girolamo; Marotta,Giulio; Naso,Giovanni, Output buffer strength trimming.
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Chien Pien, Output buffer with static and transient pull-up and pull-down drivers.
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Mizuno, Hiroyuki; Ishibashi, Koichiro; Miyazaki, Masayuki, Semiconductor integrated circuit device.
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Mizuno, Hiroyuki; Minami, Masataka; Ishibashi, Koichiro; Miyazaki, Masayuki, Semiconductor integrated circuit device.
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Mizuno,Hiroyuki; Ishibashi,Koichiro; Miyazaki,Masayuki, Semiconductor integrated circuit device.
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Mizuno,Hiroyuki; Minami,Masataka; Ishibashi,Koichiro; Miyazaki,Masayuki, Semiconductor integrated circuit device.
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Kumagai Kouichi,JPX ; Kurosawa Susumu,JPX, Semiconductor integrated circuit device with low power consumption and simple manufacturing steps.
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Masao Taguchi JP; Satoshi Eto JP; Yoshihiro Takemae JP; Hiroshi Yoshioka JP; Makoto Koga JP, Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation.
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Lee, In young; Yun, Seok-Ju; Lee, Sang-Gug; Choi, Seong Hoon; Kim, Chang Sun, Switch, negative resistance cell, and differential voltage controlled oscillator using the same.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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연합인증

Master slice semiconductor integrated circuit with output drive current control 원문보기

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Master slice semiconductor integrated circuit with output drive current control 원문보기

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이 특허를 인용한 특허 (17)

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