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Method and apparatus for aiding system design 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/20
출원번호 US-0966128 (1992-10-23)
발명자 / 주소
  • Talbott Marvin T. (Plano TX) Burks Henry L. (Dallas TX) Shaw Richard W. (Plano TX) Amundsen Michael (Dallas TX) Hutchison Katherine K. (Dallas TX) Strasburg Donald D. (Plano TX)
출원인 / 주소
  • Texas Instruments Incorporated (Dallas TX 02)
인용정보 피인용 횟수 : 56  인용 특허 : 0

초록 ▼

A method and apparatus are provided for aiding system design with a computer. The system is decomposed into a plurality of objects. The objects may have a parent-child hierarchical relationship wherein one or more of the child objects each define a portion of a parent object. A plurality of text fil

대표청구항 ▼

A method of aiding system design with a computer, wherein the computer performs the following steps comprising: decomposing the system design into a first set of objects and a second set of objects, each of said objects having a parent-child hierarchical relationship, wherein a child object of said

이 특허를 인용한 특허 (56)

  1. Farber, David A.; Lachman, Ronald D., Accessing data in a data processing system.
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  8. Farber, David A.; Lachman, Ronald D., Controlling access to data in a data processing system.
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  9. Rizzolo, Charles D.; Stokes, Ronald E.; LaVallee, Louis F.; Gardiner, Charles M.; Smith, William R.; Cupo, Kathy; Pagano, Richard S.; Cornell, Joel S.; Mandel, Barry P.; Simpson, Ralph E.; Potter, John T., Critical parameter/requirements management process and environment.
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  10. Rizzolo, Charles D.; Stokes, Ronald E.; LaVallee, Louis F.; Gardiner, Charles M.; Smith, William R.; Cupo, Kathy; Pagano, Richard S.; Cornell, Joel S.; Mandel, Barry P.; Simpson, Ralph E.; Potter, John T., Critical parameter/requirements management process and environment.
    상세보기
  11. Rizzolo, Charles D.; Stokes, Ronald E.; LaVallee, Louis F.; Gardiner, Charles M.; Smith, William R.; Cupo, Kathy; Pagano, Richard S.; Cornell, Joel S.; Mandel, Barry P.; Simpson, Ralph E.; Potter, John T., Critical parameter/requirements management process and environment.
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  12. Ishikawa,Masahito, Design method and design system for vehicular lamp, program to execute designing of vehicular lamp and record medium recording the program.
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  13. Morikawa,Omi; Ishikawa,Masahito, Design method and design system for vehicular lamp, program to execute designing of vehicular lamp and record medium recording the program.
    상세보기
  14. Sachiko Nakagawa JP; Toshiyuki Araki JP; Hiroaki Maezawa JP; Yoshihiro Giga JP; Mimiko Hayashi JP; Satoshi Kono JP; Masayuki Murata JP; Fumie Izumikawa JP; Kouya Takeshita JP; Syutaro Katsuk, Device and method for supporting system development and computer-readable medium.
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  15. Schuh, David; Kukla, James, Display screen with graphical user interface.
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  16. Schuh, David; Kukla, James, Display screen with graphical user interface.
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  17. Carpenter Shawn R. ; Lewis Samuel J., Distributed test pattern generation.
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  18. Rose, Anthony, Filter for a distributed network.
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  19. Rose, Anthony, Filter for a distributed network.
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  20. Rose, Anthony, Filter for a distributed network.
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  21. Hansen,Allan M.; Jackson,Bradley K.; Rogers,Lawrence W.; Schieferdecker,Scott A.; Patterson,David W.; Farcy,Philip H.; Bouffiou,Carl E.; Zayic,Jerry D., Identification of engineering intent requirements in an electronic environment.
    상세보기
  22. Ito Kenji,JPX, Integrated construction project information management system.
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  23. Nozawa Takashi (Susono JPX), Method and apparatus for assisting the design of parts of a product.
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  24. Aubel, Mark D.; Kerzman, Joseph P.; Nead, James M.; Rezek, James E., Method and apparatus for associating selected circuit instances and for performing a group operation thereon.
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  25. Shah, Ashish; Wells, Mark, Method and apparatus for attribute selection.
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  26. Shah,Ashish; Wells,Mark, Method and apparatus for attribute selection.
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  27. Hartman Linda Marie, Method and apparatus for computer aided building specification generation.
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  28. Kerzman Joseph P. ; Rezek James E. ; Rusterholz John T., Method and apparatus for distributing a clock tree within a hierarchical circuit design.
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  29. Kerzman,Joseph P.; Rezek,James E., Method and apparatus for efficiently viewing a number of selected components using a database editor tool.
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  30. Merryman Kenneth E. ; Cleereman Kevin C. ; Engelbrecht Kenneth L., Method and apparatus for identifying gated clocks within a circuit design using a standard optimization tool.
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  31. Cleereman Kevin C. ; Merryman Kenneth E. ; Thatcher Steve D., Method and apparatus for incremntally optimizing a circuit design.
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  32. Gupta Neeraj ; Veeraraghavan Venky ; Agarwal Ajay, Method and apparatus for maintaining and configuring systems.
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  33. Gupta, Neeraj; Veeraraghavan, Venky; Agarwal, Ajay, Method and apparatus for maintaining and configuring systems.
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  34. Gupta, Neeraj; Veeraraghavan, Venky; Agarwal, Ajay, Method and apparatus for maintaining and configuring systems.
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  35. Neeraj Gupta ; Venky Veeraraghavan ; Ajay Agarwal, Method and apparatus for maintaining and configuring systems.
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  36. Rezek James E. ; Cleereman Kevin C. ; Merryman Kenneth E. ; Engelbrecht Kenneth L., Method and apparatus for optimizing a circuit design having multi-paths therein.
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  37. Merryman Kenneth E. ; Cleereman Kevin C. ; Engelbrecht Kenneth L., Method and apparatus for optimizing a gated clock structure using a standard optimization tool.
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  38. Fenton Shaun,GB3, Method and apparatus for producing a specific manual for configurable electronic equipment.
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  39. Do, Sung Hee; Suh, Nam, Method and apparatus for producing software.
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  40. Alferness, Merwin H.; Aubel, Mark D.; Hathaway, Frederick H., Method and apparatus for providing modularity to a behavioral description of a circuit design.
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  41. Cleereman Kevin C. ; Merryman Kenneth E., Method and apparatus for providing optimization parameters to a logic optimizer tool.
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  42. Kerzman, Joseph Peter; Rezek, James Edward, Method and apparatus for selecting and aligning cells using a placement tool.
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  43. Kerzman, Joseph P.; Rezek, James E.; Aubel, Mark D.; Alferness, Merwin H., Method and apparatus for selecting components within a circuit design database.
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  44. Merryman, Kenneth E.; Lautzenheiser, Ted G.; Engh, Michael K., Method and apparatus for selectively providing hierarchy to a circuit design.
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  45. Garnett, Robert E.; Kerzman, Joseph P.; Rezek, James E.; Aubel, Mark D., Method and apparatus for selectively viewing nets within a database editor tool.
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  46. Kerzman, Joseph Peter; Rezek, James Edward, Method and apparatus for traversing and placing cells using a placement tool.
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  47. Garnett, Robert E.; Kerzman, Joseph P.; Rezek, James E.; Aubel, Mark D., Method and apparatus for using a placement tool to manipulate cell substitution lists.
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  48. Maeda Sumiko,JPX ; Fukase Hisataka,JPX, Method for making electronic circuit design data and CAD system using the method.
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  49. Gilbert Douglas J. ; Rezek James E. ; Reindel Harold E. ; Tabbert Allen B. A., Method of stabilizing component and net names of integrated circuits in electronic design automation systems.
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  50. Sastry, Ann Marie; Zhang, Xiangchun; Wang, Chia-Wei; Chen, Yen-Hung; Langlois, Marc, Methodology for design of a manufacturing facility for fabrication of solid state hybrid thin film energy storage and conversion devices.
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  51. Ramani, Karthnik; Devanathan, Srikanth; Subramaniam, Jayanti; Cunningham, Robert Thomas Brent; Peters, Christopher, Multi-tier and multi-domain distributed rapid product configuration and design system.
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  52. Keong Woo Peng,SGX ; Yun Khoong Hock,SGX ; Huat Sia Siong,SGX ; Chung Liau Hon,SGX ; Salzberg Ken, Part development system.
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  53. Sferro Peter Richard ; Burek Gregory John ; O'Reilly Sean Bogue, Simultaneous manufacturing and product engineering integrated with knowledge networking.
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  54. Merryman, Kenneth E.; Arnold, Ronald G., Spreadsheet driven I/O buffer synthesis process.
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  55. Riedl, Patrick H.; Mothershead, Jerome S., System design using part roles.
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  56. Mehta, Alok; Dharani, Mirza Pyarali, Technical interaction model.
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