$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Circuit and method of previewing analog trimming 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-003/01
  • H03B-001/04
출원번호 US-0160762 (1993-12-03)
발명자 / 주소
  • Stolfa David L. (Phoenix AZ)
출원인 / 주소
  • Motorola, Inc. (Schaumburg IL 02)
인용정보 피인용 횟수 : 54  인용 특허 : 0

초록

An analog trim circuit enables and disables one or more serially connected passive elements for setting characteristics of the circuit. Each passive element has a transistor across its first and second conduction terminals operating in response to a control signal from a control circuit for enabling

대표청구항

An analog trim circuit, comprising: a passive element having first and second conduction terminals; first means coupled across said passive element and operating in response to a control signal for enabling and disabling conduction through said passive element, said first means includes a transistor

이 특허를 인용한 특허 (54)

  1. Behzad, Arya Reza, Adjustable bandwidth high pass filter for large input signal, low supply voltage applications.
  2. Behzad, Arya Reza, Adjustable bandwidth high pass filter for large input signal, low supply voltage applications.
  3. Behzad,Arya Reza, Adjustable bandwidth high pass filter for large input signal, low supply voltage applications.
  4. Yen, Hsiao-Tsung; Lin, Yu-Ling, Adjustable meander line resistor.
  5. Lin,Yu Tong, Adjusting circuit.
  6. McCollum, John, Antifuse programmable resistor.
  7. Hu, Chih-Ting; Chen, Ken-Hui; Hung, Chun-Hsiung, Automatic internal trimming calibration method to compensate process variation.
  8. Hu, Chih-Ting; Chen, Ken-Hui; Hung, Chun-Hsiung, Automatic internal trimming calibration method to compensate process variation.
  9. Torimaru Yasuo,JPX ; Semi Atsushi,JPX ; Kawaishi Kaneo,JPX, Buffer circuits with changeable drive characteristic.
  10. Dixon, Scott, Circuit and method for integrated circuit configuration.
  11. Shyr, You-Yuh; Negru, Sorin Laurentiu, Circuit and method for trimming integrated circuits.
  12. Shyr,You Yuh; Negru,Sorin Laurentiu, Circuit and method for trimming integrated circuits.
  13. Shyr,You Yuh; Negru,Sorin Laurentiu, Circuit and method for trimming integrated circuits.
  14. You-Yuh Shyr ; Sorin Laurentiu Negru, Circuit and method for trimming integrated circuits.
  15. Kim Young-Hee,KRX ; Ku Kie-Bong,KRX, Circuit for generating a reference voltage trimmed by an anti-fuse programming.
  16. Sher, Joseph C.; Loughmiller, Daniel R., Clamp circuit with fuse options.
  17. Sher,Joseph C.; Loughmiller,Daniel R., Clamp circuit with fuse options.
  18. Zarrabian Morteza ; Carroll Kenneth J., Digitally controlled trim circuit.
  19. Park, Jong Tai, Electrical fuse programming control circuit.
  20. Klingström, Leif, Electronic device, circuit and method for trimming electronic components.
  21. Hellums James R., Fuse trim circuit that does not prestress fuses.
  22. Behzad, Arya R.; Bult, Klaas; Gomez, Ramon A.; Lin, Chi-Hung; Kwan, Tom W.; Agazzi, Oscar E.; Creigh, John L.; Hatamian, Mehdi; Kruse, David E.; Abnous, Arthur; Samueli, Henry, Gigabit ethernet transceiver with analog front end.
  23. Behzad,Arya R.; Bult,Klaas; Gomez,Ramon A.; Lin,Chi Hung; Kwan,Tom W.; Agazzi,Oscar E.; Creigh,John L.; Hatamian,Mehdi; Kruse,David E.; Abnous,Arthur; Samueli,Henry, Gigabit ethernet transceiver with analog front end.
  24. Behzad, Arya Reza, High linearity large bandwidth, switch insensitive, programmable gain attenuator.
  25. Behzad, Arya Reza, High linearity large bandwidth, switch insensitive, programmable gain attenuator.
  26. Behzad,Arya Reza, High linearity large bandwidth, switch insensitive, programmable gain attenuator.
  27. Pesavento, Alberto, Hybrid non-volatile memory.
  28. Behzad, Arya Reza, Large dynamic range programmable gain attenuator.
  29. Behzad, Arya Reza, Large dynamic range programmable gain attenuator.
  30. Behzad,Arya Reza, Large dynamic range programmable gain attenuator.
  31. Yen, Hsiao-Tsung; Lin, Yu-Ling, Meander line resistor structure.
  32. Lorenz,Harald, Method and apparatus for calibration of an on-chip temperature sensor within a memory device.
  33. Derner Scott, Method and apparatus for testing adjustment of a circuit parameter.
  34. Scott Derner, Method and apparatus for testing adjustment of a circuit parameter.
  35. Jain,Rajiv; Wong,Richard J., Method of programming an antifuse.
  36. Romas, Jr., Gregory G.; Wang, Jian, Methods and apparatus for trimming packaged electrical devices.
  37. Kim San-hong,KRX ; Lee Seung-keun,KRX, Mode setting circuit for a memory device.
  38. Pio Federico,ITX ; Vajana Bruno,ITX ; Paruzzi Paola,ITX, Monolithically integrated generator of a plurality of voltage values.
  39. Lindhorst, Chad A.; Humes, Todd E.; Horch, Andrew E.; Allen, III, Ernest, One time programmable memory test structures and methods.
  40. Salman, Saed; Grudin, Oleg; Landsberger, Leslie M.; Frolov, Gennadiy; Tsang, Tommy; Huang, Zhen-grong, Passive resistive-heater addressing network.
  41. Gutnik,Vadim; Hyde,John D.; Dressler,David D.; Pesavento,Alberto; Oliver,Ronald A.; Cooper,Scott Anthony; Sundstrom,Kurt Eugene, RFID tags with electronic fuses for storing component configuration data.
  42. Yamashita,Masahiro; Uehara,Takashi; Takaku,Mamoru; Nambu,Hiroaki, Semiconductor memory device and semiconductor device.
  43. Yamashita,Masahiro; Uehara,Takashi; Takaku,Mamoru; Nambu,Hiroaki, Semiconductor memory device and semiconductor device.
  44. Chung,Shine Chien; Chen,Yun Sheng, Storing information with electrical fuse for device trimming.
  45. Chrisman Lars R. ; Heneveld Scott H. ; Peters Stephen F., Surgical instrument with improvement safety lockout mechanisms.
  46. Marcellus R. Chen, System and method for trimming IC parameters.
  47. Hashimoto Yasuhiro,JPX, Trimming circuit.
  48. Yasuhiro Hashimoto JP; Katsuya Shimizu JP, Trimming circuit of semiconductor apparatus.
  49. Iwamoto, Motomitsu, Trimming device.
  50. John,Soji K.; Nguyen,Baoson; Mayhugh,Terry L., Trimming for accurate reference voltage.
  51. Kim Hong-Beom,KRX ; Kang Sang-Seok,KRX ; Kwak Byung-Heon,KRX ; Park Yong-Jin,KRX, Voltage clamping circuit for semiconductor devices.
  52. Tsuchida Kazuhito,JPX, Voltage setting circuit in a semiconductor integrated circuit.
  53. Pesavento, Alberto, pFET nonvolatile memory.
  54. Pesavento, Alberto; Hyde, John D., pFET nonvolatile memory.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로