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Method and apparatus for optimizing cost-based heuristic instruction scheduling 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/38
출원번호 US-0088418 (1993-07-07)
발명자 / 주소
  • Tarsy Gregory (Scotts Valley CA) Woodard Michael J. (Fremont CA)
출원인 / 주소
  • Sun Microsystems, Inc. (Mountain View CA 02)
인용정보 피인용 횟수 : 33  인용 특허 : 0

초록

A method and apparatus for optimizing cost-based heuristic instruction scheduling for a pipelined processor is disclosed which has particular application to compile time instruction scheduling after code generation. Instruction scheduling is optimized by determining the optimal weights to be used by

대표청구항

In a computer system comprising a pipelined processor for executing instructions of programs in a parallel and overlapping manner, and a compiler for compiling and generating said instructions, wherein said compiler has a scheduler for scheduling said instructions for execution on said pipelined pro

이 특허를 인용한 특허 (33)

  1. Heidari, Ghobad; Chang, Kuor Hsin; Master, Paul L.; Hogenauer, Eugene B.; Scheuermann, Walter James, Communications module, device, and method for implementing a system acquisition function.
  2. Soltis, Jr.,Donald C.; Delano,Eric, Core parallel execution with different optimization characteristics to decrease dynamic execution path.
  3. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  4. Kojima Hirotsugu (Foster City CA) Sasaki Katsuro (Los Altos CA), High speed, reduced power memory system implemented according to access frequency.
  5. de Jong,Eduard K., Interleaved data and instruction streams for application program obfuscation.
  6. Long, Dean R. E., Interpreter optimization for native endianness.
  7. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  8. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  9. Blumenthal, Andreas; Luedde, Mirko; Manzke, Thomas; Mielenhausen, Bjoern; Swanepoel, Christiaan E., Measuring software system performance using benchmarks.
  10. Tirumalai Partha P. (Fremont CA), Method and apparatus for automatic selection of the load latency to be used in modulo scheduling in an optimizing compil.
  11. Smaalders Bart ; Clarke Kevin J., Method and apparatus for reordering components of computer programs.
  12. Arbabi Mansur (Montgomery County MD) Baniak Jonathan E. (Montgomery County MD), Method and apparatus for scheduling resources.
  13. Master, Paul L., Method and system for creating and programming an adaptive computing engine.
  14. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  15. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  16. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  17. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  18. Hill, Ralph D., Method for estimating cost when placing operations within a modulo scheduler when scheduling for processors with a large number of function units or reconfigurable data paths.
  19. Hill,Ralph D., Method for estimating cost when placing operations within a modulo scheduler when scheduling for processors with a large number of function units or reconfigurable data paths.
  20. Chen Chi-Chung K., Method for generating instructions for an object-oriented processor.
  21. Mitran, Marcel; Siu, Joran S. C.; Vasilevskiy, Alexander, Methods, systems, and computer products for evaluating robustness of a list scheduling framework.
  22. de Jong,Eduard K., Multiple instruction dispatch tables for application program obfuscation.
  23. de Jong,Eduard K., Non-linear execution of application program instructions for application program obfuscation.
  24. Rehg,James M.; Knobe,Kathleen, On-line scheduling of constrained dynamic applications for parallel targets.
  25. de Jong,Eduard K., Permutation of opcode values for application program obfuscation.
  26. Martin, Allan Russell, Pinning internal slack nodes to improve instruction scheduling.
  27. Martin,Allan Russell, Pinning internal slack nodes to improve instruction scheduling.
  28. Volkonsky, Vladimir Y.; Ostanevich, Alexander Y.; Sushentsov, Alexander L., Profile driven code motion and scheduling.
  29. Master, Paul L., Profiling of software and circuit designs utilizing data operation analyses.
  30. de Jong, Eduard K., Rendering and encryption engine for application program obfuscation.
  31. Master, Paul L.; Watson, John, System for adapting device standards after manufacture.
  32. Rehg,James M.; Knobe,Kathleen, System for computing the optimal static schedule using the stored task execution costs with recent schedule execution costs.
  33. Katragadda, Ramana; Spoltore, Paul; Howard, Ric, Task definition for specifying resource requirements.
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