로그인시 본인확인과정이 필요할 수 있습니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기
| 국가/구분 | United States(US) Patent 등록 |
|---|---|
| 국제특허분류(IPC7판) |
|
| 출원번호 | US-0945001 (1992-09-15) |
| 우선권정보 | FR-0011491 (1991-09-18) |
| 발명자 / 주소 |
|
| 출원인 / 주소 |
|
| 인용정보 | 피인용 횟수 : 951 인용 특허 : 0 |
Process for the preparation of thin moncrystalline or polycrystalline semiconductor material films, characterized in that it comprises subjecting a semiconductor material wafer having a planar face to the three following stages: a first stage of implantation by bombardment (2) of the face (4) of the
Process for the preparation of thin moncrystalline or polycrystalline semiconductor material films, characterized in that it comprises subjecting a semiconductor material wafer having a planar face to the three following stages: a first stage of implantation by bombardment (2) of the face (4) of the said wafer (1) by means of ions creating in the volume of said wafer a layer (3) of gaseous microbubbles defining in the volume of said wafer a lower region (6) constituting the mass of the substrate and an upper region (5) constituting the thin film, a second stage of intimately contacting the planar face (4) of said wafer with a stiffener (7) constituted by at least one rigid material layer, a third stage of heat treating the assembly of said wafer (1) and said stiffener (7) at a temperature above that at which the ion bombardment (2) was carried out and sufficient to create by a crystalline rearrangement effect in said wafer (1) and a pressure effect in the said microbubbles, a separation between the thin film (5 ) and the mass of the substrate (6).
Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane, is substantially parallel to a principal crystallographic plane, to the three following stages: a first stage of implantatio
Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane, is substantially parallel to a principal crystallographic plane, to the three following stages: a first stage of implantation by ion bombardment of the face of said wafer by means of ions creating in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin film, the ions being chosen from among hydrogen gas ions or rare gas ions and the temperature of the wafer during implantation being kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion, a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer, a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer and a pressure effect in the microbubbles, a separation between the thin film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage.
Copyright KISTI. All Rights Reserved.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.