IPC분류정보
| 국가/구분 |
United States(US) Patent
등록
|
| 국제특허분류(IPC7판) |
|
| 출원번호 |
US-0219865
(1994-03-30)
|
| 우선권정보 |
JP-0337149 (1991-12-19) |
|
발명자
/ 주소 |
- Kokubo Nobuyuki (Hyogo JPX) Ikeda Kazuya (Hyogo JPX)
|
| 출원인 / 주소 |
- Mitsubishi Denki Kabushiki Kaisha (Tokyo JPX 03)
|
| 인용정보 |
피인용 횟수 :
36 인용 특허 :
0 |
초록
▼
A power supply voltage level detecting circuit includes a reference voltage generating circuit for generating a constant reference voltage independent of a power supply voltage, a to-be-compared voltage generating circuit for generating a voltage to be compared changing dependent upon the power supp
A power supply voltage level detecting circuit includes a reference voltage generating circuit for generating a constant reference voltage independent of a power supply voltage, a to-be-compared voltage generating circuit for generating a voltage to be compared changing dependent upon the power supply voltage, a current mirror type differentially amplifying circuit for amplifying differentially the reference voltage and the voltage to be compared, and a determining circuit for generating a level detecting signal indicating whether or not the power supply voltage has attained a predetermined level in accordance with an output of the differentially amplifying circuit. The to-be-compared voltage generating circuit generates the voltage to be compared by dropping the power supply voltage using the resistance division or the forward voltage drop of diode. Since a signal corresponding to the power supply voltage level is provided from the differentially amplifying circuit, it is possible to detect the power supply voltage level reliably without being affected by variation of an input logic threshold voltage of an inverter circuit due to the manufacturing process.
대표청구항
▼
A circuit device for detecting a level of a power supply voltage, comprising: a first terminal for receiving said power supply voltage; reference voltage generating circuit for generating a reference voltage substantially independent of variations in the power supply voltage, said reference voltage
A circuit device for detecting a level of a power supply voltage, comprising: a first terminal for receiving said power supply voltage; reference voltage generating circuit for generating a reference voltage substantially independent of variations in the power supply voltage, said reference voltage generating circuit including: a first field effect transistor having a source connected to said first terminal, a drain connected to a first output node, for outputting said reference voltage, and a gate connected to ground, said first transistor being configured as a load resistance, a second field effect transistor having a drain connected to said first output node, a source, and a gate connected to a second terminal for receiving a reset signal, and at least one third field effect transistor connected in series between the source of said second field effect transistor and ground, said at least one third field effect transistor having a gate and a drain connected together and configured as a diode; a to-be-compared voltage generating circuit for generating a to-be-compared voltage which varies with said power supply voltage including: a first resistance having one terminal connected to said first terminal, and a second terminal connected to a second output node for outputting said to-be-compared voltage, a second resistance having one terminal connected to said second output node and a second terminal, and a fourth field effect transistor, having a drain connected to said second terminal of said second resistance, a gate connected to said second terminal for receiving said reset signal, and a source connected to ground, said first resistance and said second resistance being arranged as a voltage divider; differentially amplifying means for differentially amplifying the reference voltage and the to-be-compared voltage, including: a current mirror type amplifier comprising, a fifth field effect transistor having a source connected to said first terminal, and a gate and a drain connected together, a sixth field effect transistor having a source connected to said first terminal, a gate connected to the gate of said fifth field effect transistor and a drain connected to a third output node for outputting a difference signal between said reference voltage and said to-be-compared voltage, a seventh field effect transistor having a drain connected to the drain of said fifth field effect transistor, a gate connected to said first output node, and a source, an eighth field effect transistor having a drain connected to said third output node, a gate connected to said second output node, and a source connected to the source of said seventh field effect transistor, and a ninth field effect transistor having a drain connected to the sources of said seventh and eighth field effect transistors, a gate connected to said second terminal for receiving said reset signal, and a drain connected to ground; and a determining circuit connected to and responsive to the differentially amplifying circuit for determining whether the power supply voltage has attained a predetermined level, including: an inverter circuit comprising: a tenth field effect transistor having a source connected to said first terminal, a gate connected to said third output node, and a drain connected to a fourth output node for outputting a signal indicative of whether said power supply voltage has attained a predetermined level, and a eleventh field effect transistor having a drain connected to said fourth output node a gate connected to said third output node, and a source connected to ground.
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