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Method of making a combined semiconductor device and inductor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/265
출원번호 US-0241946 (1994-05-12)
우선권정보 JP-0083509 (1992-04-06)
발명자 / 주소
  • Kanehachi Kaoru (Tokyo JPX)
출원인 / 주소
  • Nippon Precision Circuits Inc. (Tokyo JPX 03)
인용정보 피인용 횟수 : 37  인용 특허 : 0

초록

A method of making a semiconductor device having formed thereon an inductor comprises a silicon substrate. A cut out region is obtained by removing a part of the silicon substrate in a hollow shape which may be a hollow cavity or a hollow cavity with an insulating material having a low complex permi

대표청구항

A process for producing a semiconductor device, comprising the steps of: forming a first insulation layer in a given region on a first surface of a semiconductor substrate; simultaneously forming: a first conductor comprising an inductor extending across a part of said given region of said first ins

이 특허를 인용한 특허 (37)

  1. Lin, Mou-Shiung; Lee, Jin-Yuan, Chip packages having dual DMOS devices with power management integrated circuits.
  2. Choi Chang Auck,KRX ; Lee Jong Hyun,KRX ; Jang Won Ick,KRX ; Lee Yong Il,KRX ; Baek Jong Tae,KRX ; Yoo Hyung Joun,KRX, Fine inductor having 3-dimensional coil structure and method for producing the same.
  3. Lin, Mou-Shiung, High performance system-on-chip inductor using post passivation process.
  4. Lin, Mou-Shing, High performance system-on-chip using post passivation process.
  5. Lin, Mou-Shiung, High performance system-on-chip using post passivation process.
  6. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
  7. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
  8. Abadeer, Wagdi; Groves, Robert A.; Hansen, Patrick, Inductor for integrated circuits.
  9. Grzegorek Andrew Z. ; McFarland William J., Integrated circuit compatible planar inductors with increased Q.
  10. Louwers Stephan,FRX ; Marty Michel,FRX, Integrated circuit having a level of metallization of variable thickness.
  11. Norstrom, Hans; Bjormander, Carl; Johansson, Ted, Integrated circuit inductor structure and non-destructive etch depth measurement.
  12. Wen Wen Ying,TWX ; Chiang Shing Shing,TWX, Method for forming an inductor.
  13. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  14. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  15. Aoki, Tomoyuki; Yamada, Daiki, Method for manufacturing antenna and method for manufacturing semiconductor device.
  16. Chen Wei-Fan,TWX, Method of fabricating on-chip inductor.
  17. Ebefors, Thorbjorn; Kalvesten, Edvard; Bauer, Tomas, Method of making a semiconductor device having a functional capping.
  18. Basteres, Laurent; Mhani, Ahmed; Valentin, Fran.cedilla.ois; Karam, Jean-Michel, Monolithic integrated circuit incorporating an inductive component and process for fabricating such an integrated circuit.
  19. Laurent Basteres FR; Ahmed Mhani FR; Fran.cedilla.ois Valentin FR; Jean-Michel Karam FR, Monolithic integrated circuit incorporating an inductive component and process for fabricating such an integrated circuit.
  20. Cheng, Kangguo; Tang, Hao; Xu, Peng, Multi-layer filled gate cut to prevent power rail shorting to gate structure.
  21. Cheng, Kangguo; Tang, Hao; Xu, Peng, Multi-layer filled gate cut to prevent power rail shorting to gate structure.
  22. Uemura Kazuyoshi,JPX ; Takahashi Kiyoshi,JPX, Planar-type inductor and fabrication method thereof.
  23. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
  24. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection structures.
  25. Padmanathan, Meenakshi; Yoon, Seung Wook; Lee, YongTaek, Semiconductor device and method of forming inductor over insulating material filled trench in substrate.
  26. Segawa, Mizuki; Yabu, Toshiki; Matsuzawa, Akira, Semiconductor device and method of manufacturing the same.
  27. Nakashiba, Yasutaka, Semiconductor device for transmitting electrical signals between two circuits.
  28. Yamazaki Toru,JPX, Semiconductor device having inductor element made of first conductive layer of spiral configuration electrically connected to second conductive layer of insular configuration.
  29. Figueredo, Domingo A.; Ruby, Richard C.; Oshmyansky, Yury; Bradley, Paul, Thin film bulk acoustic resonator (FBAR) and inductor on a monolithic substrate and method of fabricating the same.
  30. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  31. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  32. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  33. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  34. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  35. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  36. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  37. Lin, Mou-Shiung; Wei, Gu-Yeon, Voltage regulator integrated with semiconductor chip.
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