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Ring oscillator having a variable oscillating frequency 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03B-001/00
  • G11C-007/00
출원번호 US-0992579 (1992-12-18)
우선권정보 JP-0337063 (1991-12-19)
발명자 / 주소
  • Itoh Nobuhiko (Tenri JPX) Ihara Makoto (Sakurai JPX)
출원인 / 주소
  • Sharp Kabushiki Kaisha (Osaka JPX 03)
인용정보 피인용 횟수 : 67  인용 특허 : 0

초록 ▼

A ring oscillator includes a plurality of inverters, a leakage current generating part, and a current controlling part. The current controlling part supplies the inverters with a source current in accordance with a value of a leakage current generated from the leakage current generating part. The le

대표청구항 ▼

A ring oscillator, comprising: a leakage current generating means for generating a leakage current; a current controlling means for generating a source current by amplifying the leakage current generated from the leakage current generating means, a value of the source current varying in accordance w

이 특허를 인용한 특허 (67)

  1. Pitkethly, Scott; Masleid, Robert Paul, Advanced repeater utilizing signal distribution delay.
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  2. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
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  3. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
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  4. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
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  5. Masleid, Robert Paul; Dholabhai, Vatsal, Circuit with enhanced mode and normal mode.
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  6. Masleid, Robert Paul; Kowalczyk, Andre, Circuits and methods for detecting and assisting wire transitions.
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  7. Masleid, Robert, Circuits, systems and methods relating to a dynamic dual domino ring oscillator.
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  8. Masleid,Robert P., Circuits, systems and methods relating to dynamic ring oscillators.
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  9. Koniaris, Kleanthes G.; Burr, James B., Closed loop feedback control of integrated circuits.
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  10. Koniaris, Kleanthes G.; Burr, James B., Closed loop feedback control of integrated circuits.
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  11. Masleid, Robert Paul, Column select multiplexer circuit for a domino random access memory array.
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  12. Masleid,Robert P., Column select multiplexer circuit for a domino random access memory array.
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  13. Masleid, Robert Paul, Configurable delay chain with stacked inverter delay elements.
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  14. Masleid, Robert Paul, Configurable delay chain with switching control for tail delay elements.
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  15. Masleid, Robert Paul, Configurable tapered delay chain with multiple sizes of delay elements.
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  16. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
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  17. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
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  18. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
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  19. Nakashima Teruya (Kanagawa JPX) Umeyama Takehiko (Hyogo JPX), Current control circuit of ring oscillator.
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  20. Masleid, Robert P, Dynamic ring oscillators.
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  21. Chen, Tien-Min, Feedback-controlled body-bias voltage source.
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  22. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
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  23. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
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  24. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
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  25. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
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  26. Masleid, Robert P, Inverting zipper repeater circuit.
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  27. Masleid, Robert P., Inverting zipper repeater circuit.
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  28. Masleid, Robert Paul, Inverting zipper repeater circuit.
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  29. Masleid, Robert, Leakage efficient anti-glitch filter.
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  30. Eitan Boaz,ILX, Low power programmable ring oscillator.
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  31. Reddy, Sreenivas Aerra; Arulanandam, Srinivasan; Rajaraman, Venkataraman, Maintaining optimum voltage supply to match performance of an integrated circuit.
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  32. Persun,Marijan; Samaan,Samie B., Method and apparatus for measuring relative, within-die leakage current and/or providing a temperature variation profile using a leakage inverter and ring oscillator.
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  33. Murakami, Hideaki, Method and apparatus for stable phase-locked looping.
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  34. Murakami, Hideaki, Method and apparatus for stable phase-locked looping.
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  35. Huang, Jensen; Diard, Franck; Saulters, Scott, Method and system for artificially and dynamically limiting the framerate of a graphics processing unit.
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  36. Diard, Franck; Kadaba, Ganesh, Methods and system for artifically and dynamically limiting the display resolution of an application.
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  37. Yeric, Gregory Munson, Operating parameter monitor for an integrated circuit.
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  38. Myers, James Edward; Flynn, David Walter; Idgunji, Sachin Satish; Yeric, Gregory Munson, Operating parameter monitoring circuit and method.
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  39. Li, Sau Yan Keith; Dewey, Thomas Edward; Jamkar, Saket Arun; Parikh, Amit, Power consumption reduction systems and methods.
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  40. Masleid, Robert Paul, Power efficient multiplexer.
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  41. Masleid, Robert Paul, Power efficient multiplexer.
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  42. Masleid, Robert Paul, Power efficient multiplexer.
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  43. Masleid, Robert Paul, Power efficient multiplexer.
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  44. Frid, Aleksandr; Sriram, Parthasarathy, Power management with dynamic frequency adjustments.
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  45. Frid, Aleksandr; Sriram, Parthasarathy, Power management with dynamic frequency adjustments.
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  46. Kelleher, Brian M.; Mimberg, Ludger; Kranzusch, Kevin; Lam, John; Velmurugan, Senthil S., Processor performance adjustment system and method.
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  47. Alben, Jonah M.; Kranzusch, Kevin, Processor temperature adjustment system and method.
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  48. Alben, Jonah M.; Kranzusch, Kevin, Processor voltage adjustment system and method.
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  49. Masleid, Robert Paul; Dholabhai, Vatsal; Klingner, Christian, Repeater circuit having different operating and reset voltage ranges, and methods thereof.
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  50. Masleid, Robert Paul; Dholabhai, Vatsal, Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability.
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  51. Stoiber, Steven T.; Siu, Stuart, Ring based impedance control of an output driver.
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  52. Stoiber, Steven T.; Siu, Stuart, Ring based impedance control of an output driver.
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  53. Masleid, Robert Paul; Sousa, Jose; Kottapalli, Venkata, Scannable dynamic circuit latch.
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  54. Lee,Jong Chern, Self refresh oscillator.
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  55. Terada Yutaka,JPX ; Iwata Toru,JPX, Semiconductor integrated circuit.
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  56. Masleid, Robert P.; Burr, James B., Stacked inverter delay chain.
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  57. Suzuki, Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
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  58. Suzuki, Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
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  59. Suzuki,Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
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  60. Suzuki,Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
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  61. Suzuki, Shingo; Burr, James, System and method for measuring transistor leakage current with a ring oscillator.
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  62. Suzuki,Shingo; Burr,James, System and method for measuring transistor leakage current with a ring oscillator.
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  63. Suzuki, Shingo, System and method for measuring transistor leakage current with a ring oscillator with backbias controls.
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  64. Pitkethly, Scott; Masleid, Robert P., Triple latch flip flop system and method.
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  65. Pitkethly,Scott; Masleid,Robert P., Triple latch flip flop system and method.
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  66. Ishibashi Atsuhiko,JPX, Voltage controlled ring oscillator stabilized against supply voltage fluctuations.
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  67. Nagasawa Hideaki,JPX ; Ishibashi Atsuhiko,JPX, Voltage controlled ring oscillator stabilized against supply voltage fluctuations.
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