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Direct wafer bonded structure method of making

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/265
  • H01L-021/76
출원번호 US-0190393 (1994-02-02)
발명자 / 주소
  • Pages Irenee (Mesa AZ) D\Aragona Francesco (Scottsdale AZ) Sellers James A. (Tempe AZ) Wells Raymond C. (Scottsdale AZ)
출원인 / 주소
  • Motorola, Inc. (Schaumburg IL 02)
인용정보 피인용 횟수 : 27  인용 특허 : 0

초록

A method for forming a direct wafer bonded structure having a buried high temperature metal nitride layer (16) and improved thermal conductivity is provided. By patterning the high temperature metal nitride layer (16) with a non-oxidizing photoresist stripper and absent a photoresist hardening step,

대표청구항

A method for making a direct wafer bonded structure comprising the steps of: providing an active substrate of a first conductivity type having a first and second surface; forming a high temperature metal nitride layer on the first surface of the active substrate; depositing a photoresist layer on th

이 특허를 인용한 특허 (27)

  1. Chan Kevin Kok ; D'Emic Christopher Peter ; Jones Erin Catherine ; Solomon Paul Michael ; Tiwari Sandip, Back-plane for semiconductor device.
  2. Houston Theodore W., Buried oxide with a thermal expansion matching layer for SOI.
  3. Kim, Seung Jee; Chung, Qwan Ho; Nam, Jong Hyun; Kim, Si Han; Lee, Sang Yong; Shin, Seong Cheol, Electronic device packages having bumps and methods of manufacturing the same.
  4. Kumar Arvind ; Tiwari Sandip, Floating back gate electrically erasable programmable read-only memory (EEPROM).
  5. Arvind Kumar ; Sandip Tiwari, Floating back gate electrically erasable programmable read-only memory(EEPROM).
  6. Bryant, Andres; Nowak, Edward J.; Williams, Richard Q., High performance capacitors in planar back gates CMOS.
  7. Begley Patrick A. ; Young William R. ; Rivoli Anthony L. ; Delgado Jose Avelino ; Gaul Stephen J., Integrated circuit air bridge structures and methods of fabricating same.
  8. Patrick A. Begley ; William R. Young ; Anthony L. Rivoli ; Jose Avelino Delgado ; Stephen J. Gaul, Integrated circuit air bridge structures and methods of fabricating same.
  9. Ek Bruce Allen (Pelham Manor NY) Gates Stephen McConnell (Ossining NY) Guarin Fernando Jose (Millbrook NY) Iyer Subramanian Srikanteswara (Yorktown Heights NY) Powell Adrian Roger (Brookfield CT), Method for forming a single crystal semiconductor on a substrate.
  10. Chan Kevin Kok ; D'Emic Christopher Peter ; Jones Erin Catherine ; Solomon Paul Michael ; Tiwari Sandip, Method for making bonded metal back-plane substrates.
  11. Mikhaylichenko, Katrina; Ravkin, Michael; deLarios, John, Method for post-etch and strip residue removal on coral films.
  12. Nam Chul-Woo,KRX, Method of fabricating semiconductor device.
  13. Lesk Israel A. (Phoenix AZ) Robb Francine Y. (Tempe AZ) Terry Lewis E. (Phoenix AZ) Secco d\Aragona Frank (Scottsdale AZ), Method of forming a conductive diffusion barrier.
  14. Cox Paul Kevin ; Tran Thy Ngu-Uyen ; Wright Samuel Jay ; Sobresky Judith, Method of forming a semiconductor device by DUV resist patterning.
  15. Komatsu, Michio; Nakashima, Akira; Egami, Miki; Muraguchi, Ryo, Method of forming a silica-containing coating film with a low dielectric constant and semiconductor substrate coated with such a film.
  16. Morrow, Patrick; List, R. Scott; Kim, Sarah E., Methods of forming backside connections on a wafer stack.
  17. Morrow,Patrick; List,R. Scott; Kim,Sarah E., Methods of forming backside connections on a wafer stack.
  18. Ishikawa Hiraku,JPX, Multilevel interconnection in a semiconductor device and method for forming the same.
  19. Storteboom, John Thomas; Chapin, Jeffrey Ryan; Wolos, Gregory; Brandt, Kenneth; Lantz, Daniel J.; Brockmeier, Oivind; D'Emidio, Brandon Michael, Plastic pallet with support blocks having upper and lower towers and associated methods.
  20. Bacchetta, Maurizio; Zanotti, Luca; Queirolo, Giuseppe, Process for the production of a semiconductor device having better interface adhesion between dielectric layers.
  21. H철lzl,Robert; Dantz,Dirk; Huber,Andreas; Lambert,Ulrich; Wahlich,Reinhold, SOI wafer and process for producing it.
  22. Sinha, Nishant; Sandhu, Gurtej S.; Smythe, John, Semiconductor material manufacture.
  23. Barth, Jr., John E.; Ho, Herbert L.; Khan, Babar A.; Peterson, Kirk D., Semiconductor-on-oxide structure and method of forming.
  24. Barth, Jr., John E.; Ho, Herbert L.; Khan, Babar A.; Peterson, Kirk D., Semiconductor-on-oxide structure and method of forming.
  25. Vasquez Barbara (Austin TX) Pages Irenee M. (Tolosane FRX) Prendergast E. James (Phoenix AZ), Vertical MOSFET device having frontside and backside contacts.
  26. Murari Bruno,ITX ; Villa Flavio,ITX ; Mastromatteo Ubaldo,ITX, Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication.
  27. Murari Bruno,ITX ; Villa Flavio,ITX ; Mastromatteo Ubaldo,ITX, Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication.
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