$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Electrical interconnect using particle enhanced joining of metal surfaces 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01R-023/68
  • H05K-001/14
출원번호 US-0148907 (1993-11-08)
발명자 / 주소
  • Difrancesco Louis (Hayward CA)
출원인 / 주소
  • Particle Interconnect Inc. (Hayward CA 02)
인용정보 피인용 횟수 : 103  인용 특허 : 0

초록

A method and apparatus for electrically interconnecting various electronic elements, including circuit components, assemblies, and subassemblies. A particle enhanced material metal contact layer, having a surface, formed on the electronic elements, includes particles of greater hardness disposed on

대표청구항

An integrated circuit carrier, comprising: a terminal array formed on a surface of said integrated circuit carrier, said terminal array including individual contact elements, each contact element having base metal contact layer, including associated particles having a hardness greater than that of s

이 특허를 인용한 특허 (103)

  1. Breed, David S.; Du Vall, Wilbur E.; Johnson, Wendell C., Automotive electronic safety network.
  2. Breed, David S.; DuVall, Wilbur E.; Johnson, Wendell C.; Sanders, William Thomas, Automotive electronic safety network.
  3. Gordon Mark G., Chip stack with active cooling system.
  4. Gates, Geoffrey William; Bumb, Jr., Frank E., Compliant interconnect assembly.
  5. Faraci Tony ; DiStefano Thomas H. ; Smith John W., Connecting multiple microelectronic elements with lead deformation.
  6. Tony Faraci ; Thomas H. Distefano ; John W. Smith, Connecting multiple microelectronic elements with lead deformation.
  7. Sato,Shiho; Ito,Takeshi; Shimizu,Noboru; Miyazawa,Hideo, Connector.
  8. Thomas Di Stefano ; John W. Smith, Connector element for connecting microelectronic elements.
  9. Leif Roland Bergstedt SE; Bo Roland Carlberg SE, Device and method in electronics systems.
  10. Kozel Charles A. ; Kudla James M. ; Stack Mark, Elastomeric connector having a plurality of fine pitched contacts, a method for connecting components using the same and.
  11. Rytky, Pekka, Electric circuitry arrangement.
  12. DiStefano, Thomas H.; Fjelstad, Joseph, Electrical connection with inwardly deformable contacts.
  13. Distefano Thomas H. ; Fjelstad Joseph, Electrical connection with inwardly deformable contacts.
  14. Distefano, Thomas H.; Fjelstad, Joseph, Electrical connection with inwardly deformable contacts.
  15. DiStefano Thomas H. ; Smith John W. ; Karavakis Konstantine N. ; Kovac Zlata ; Fjelstad Joseph, Electrical connections with deformable contacts.
  16. DiStefano Thomas H. ; Smith John W. ; Karavakis Konstantine N. ; Kovac Zlata ; Fjelstad Joseph, Electrical connections with deformable contacts.
  17. Bahn, Robert J.; Blum, Fred A.; Neuhaus, Herbert J.; Zou, Bin, Electroless process for the preparation of particle enhanced electric contact surfaces.
  18. Andry, Paul S.; Colgan, Evan G.; Mok, Lawrence S.; Patel, Chirag S.; Seeger, David E., Electronic module comprising memory and integrated circuit processor chips formed on a microchannel cooling device.
  19. Andry, Paul S.; Colgan, Evan G., Electronic module with carrier substrates, multiple integrated circuit (IC) chips and microchannel cooling device.
  20. Millet Marcus J., Fabrication of components by coining.
  21. Fjelstad Joseph ; DiStefano Thomas H. ; Karavakis Konstantine ; Faraci Anthony B. ; Nguyen Tan, Flexible connectors for microelectronic elements.
  22. Distefano Thomas H. ; Fjelstad Joseph, Flexible contact post and post socket and associated methods therefor.
  23. Webster Larry D. ; Pardo Ehud ; Duluk ; Jr. Jerome F., Flexible electrical test fixture for integrated circuits on prototype and production printed circuit boards.
  24. Webster Larry D. ; Pardo Ehud ; Duluk ; Jr. Jerome F., Flexible electrical test fixture for integrated circuits on prototype and production printed circuit boards.
  25. Smith John W. ; Haba Belgacem, Flexible lead structures and methods of making same.
  26. Smith, John W.; Haba, Belgacem, Flexible lead structures and methods of making same.
  27. Breed, David S.; DuVall, Wilbur E.; Johnson, Wendell C.; Sanders, William Thomas, Integrated occupant protection system.
  28. C. Patrick Doherty ; Jorge L. deVarona ; Salman Akram, Interconnect and system for testing bumped semiconductor components with on-board multiplex circuitry for expanding tester resources.
  29. Kister, January, Knee probe having increased scrub motion.
  30. Kister, January, Knee probe having reduced thickness section for control of scrub motion.
  31. Kister, January, Knee probe having reduced thickness section for control of scrub motion.
  32. Fisher,Rayette Ann; Burdick, Jr.,William Edward; Rose,James Wilson, Large area transducer array.
  33. Kister, January, Layered probes with core.
  34. Di Stefano Thomas ; Smith John W., Lead configurations.
  35. Stefano, Thomas Di; Smith, John W., Lead configurations.
  36. Brindle, Steven R.; Bumb, Jr., Frank E.; Burg, John S.; Chu, Kwang-Ho; Mathews, Alexander R.; Revell, Ronald K., Low contact force, dual fraction particulate interconnect.
  37. Kister, January, Low profile probe having improved mechanical scrub and reduced contact inductance.
  38. Murtuza Masood (Sugarland TX) Attarwala Abbas I. (Mountain View CA), Low stress ball grid array package.
  39. Skinner, Michael P.; Ossiander, Teodora; Albers, Sven; Seidemann, Georg, Magnetic contacts.
  40. Skinner, Michael P.; Ossiander, Teodora; Albers, Sven; Seidemann, Georg, Magnetic contacts.
  41. Skinner, Michael P.; Ossiander, Teodora; Albers, Sven; Seidemann, Georg, Magnetic contacts.
  42. Sinsheimer Roger ; Temer Vladan ; Teglia Dave, Membrane-supported contactor for semiconductor test.
  43. Wood Alan G. ; Farnworth Warren M. ; Akram Salman ; Hembree David R., Method and apparatus for testing unpackaged semiconductor dice.
  44. Huang Kuo Ching,TWX ; Lee Yu Hua,TWX ; Wu Cheng-Ming,TWX, Method for improving the yield on dynamic random access memory (DRAM) with cylindrical capacitor structures.
  45. DiStefano, Thomas H.; Fjelstad, Joseph, Method for making a microelectronic interposer.
  46. Farnworth Warren M., Method for testing semiconductor packages using oxide penetrating test contacts.
  47. Farnworth Warren M., Method for testing semiconductor packages using oxide penetrating test contacts.
  48. Fjelstad Joseph ; Smith John W. ; Distefano Thomas H. ; Zaccardi James ; Walton A. Christian, Method of making an electronic contact.
  49. Fjelstad, Joseph; Smith, John W.; DiStefano, Thomas H.; Zaccardi, James; Walton, A. Christian, Method of making an electronic contact.
  50. Nagao Koichi,JPX ; Nakata Yoshiro,JPX ; Oki Shinichi,JPX, Method of manufacturing probe card.
  51. Fisher, Rayette Ann; Burdick, Jr., William Edward; Rose, James Wilson, Methods of fabricating a large area transducer array.
  52. Millet Marcus J., Methods of making microelectronic packages utilizing coining.
  53. DiStefano Thomas H. ; Smith John W., Microelectronic assemblies with multiple leads.
  54. DiStefano Thomas H. ; Smith John W., Microelectronic assemblies with multiple leads.
  55. DiStefano, Thomas H.; Smith, John W., Microelectronic assemblies with multiple leads.
  56. Fjelstad Joseph ; Smith John W. ; DiStefano Thomas H. ; Walton A. Christian, Microelectronic connector for engaging bump leads.
  57. Fjelstad Joseph, Microelectronic connector with planar elastomer sockets.
  58. Fjelstad, Joseph, Microelectronic connector with planar elastomer sockets.
  59. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure.
  60. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure and method of making same.
  61. Fjelstad Joseph ; Smith John W. ; Distefano Thomas H. ; Zaccardi James ; Walton A. Christian, Microelectronic contacts with asperities and methods of making same.
  62. DiStefano Thomas H. ; Smith John W., Microelectronic mounting with multiple lead deformation and bonding.
  63. Masud Beroz ; Joseph Fjelstad ; Belgacem Haba ; Christopher M. Pickett ; John Smith, Microelectronic unit forming methods and materials.
  64. Schnell,Tim, Motion detector camera.
  65. John W. Smith ; Belgacem Haba, Multi-layer substrates and fabrication processes.
  66. Smith, John W.; Haba, Belgacem, Multi-layer substrates and fabrication processes.
  67. Kister, January, Multiple contact probes.
  68. Kister, January, Multiple contact probes.
  69. Hahn ; IV John W. ; Koch James K., Power bus bar for providing a low impedance connection between a first and second printed circuit board.
  70. Cottrell Stephen E. (Pilot Hill CA), Printed circuit board adapter carrier for input/output cards.
  71. Kister, January, Probe bonding method having improved control of bonding material.
  72. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Probe card assembly and kit, and methods of making same.
  73. C. Patrick Doherty ; Jorge L. deVarona ; Salman Akram, Probe card having on-board multiplex circuitry for expanding tester resources.
  74. Doherty C. Patrick ; deVarona Jorge L. ; Akram Salman, Probe card having on-board multiplex circuitry for expanding tester resources.
  75. Kister, January, Probe cards employing probes having retaining portions for potting in a potting region.
  76. Kister, January; Shtarker, Alex, Probe retention arrangement.
  77. Kister, January; Shtarker, Alex, Probe retention arrangement.
  78. Kister, January, Probe skates for electrical testing of convex pad topologies.
  79. Kister, January, Probes with high current carrying capability and laser machining methods.
  80. Kister, January, Probes with offset arm and suspension structure.
  81. Kister, January, Probes with self-cleaning blunt skates for contacting conductive pads.
  82. Crotzer David R. (Windham NH), Resilient electrical interconnect.
  83. Chao,Iwen; Eskildsen,Steve R., Semiconducting device with folded interposer.
  84. Chao,Iwen; Eskildsen,Steve R., Semiconducting device with folded interposer.
  85. DiStefano,Thomas H.; Smith,John W.; Faraci,Tony, Semiconductor package with heat sink.
  86. Breed, David S., Single side curtain airbag for vehicles.
  87. Fjelstad Joseph ; DiStefano Thomas H. ; Smith John W., Soldering with resilient contacts.
  88. Koch James K., Space efficient local regulator for a microprocessor.
  89. Kister, January, Space transformers employing wire bonds for interconnections with fine pitch contacts.
  90. Gillette Joseph G. ; Potter Scott ; Lall Pradeep, Surface mountable flexible interconnect.
  91. Nishikawa,Hisashi; Kosaka,Hiroyuki; Nakade,Yoshiyuki; Matsui,Takao; Koma,Tetsuya; Nagahara,Makoto; Takeshita,Hiroyuki, Switch and manufacturing method thereof.
  92. Shinji Terasaka JP; Satoshi Hatazawa JP, Tape carrier package with improved connecting terminals and a method of electrically interconnecting the tape carrier package to external circuitry.
  93. Ortiz,Alfred E.; Collins,Joseph, Test system for device and method thereof.
  94. Glovatsky Andrew Z. ; Todd Michael G. ; Van Pham Cuong, Three-dimensional molded sockets for mechanical and electrical component attachment.
  95. Breed David S. ; Duvall Wilbur E. ; Johnson Wendell C., Vehicle electrical system.
  96. Breed, David S., Vehicle software upgrade techniques.
  97. Breed, David S., Vehicle software upgrade techniques.
  98. Breed, David S., Vehicle software upgrade techniques.
  99. Kister, January, Vertical guided layered probe.
  100. Kister, January, Vertical guided probe array providing sideways scrub motion.
  101. Kister, January, Vertical probe array arranged to provide space transformation.
  102. Kister, January, Vertical probe array arranged to provide space transformation.
  103. Doherty C. Patrick ; deVarona Jorge L. ; Akram Salman, Wafer test method with probe card having on-board multiplex circuitry for expanding tester resources.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로