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Method and apparatus for automatically routing around faults within an interconnect system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/00
출원번호 US-0172647 (1993-12-23)
발명자 / 주소
  • Mackenthun Donald W. (Fridley MN)
출원인 / 주소
  • Unisys Corporation (Blue Bell PA 02)
인용정보 피인용 횟수 : 52  인용 특허 : 0

초록 ▼

A computer architecture for providing enhanced reliability while mitigating the high costs of total redundancy. The HUB and Street architecture couples a plurality of commonly shared busses called streets with a plurality of smart switching elements called HUBs. The streets are busses for transferri

대표청구항 ▼

A method for detecting and rerouting around hardware faults within a computer architecture comprising; a. Evaluating an input request to a HUB element having a plurality of input ports and a plurality of output ports and selecting which of the plurality of output ports is to be accessed; b. measurin

이 특허를 인용한 특허 (52)

  1. Meyer, James W.; Kanski, Cory, Arbitration system and method for memory responses in a hub-based memory system.
    상세보기
  2. Madnani, Kiran; DesRoches, David W., Auto-adapting multi-tier cache.
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  3. Madnani, Kiran; DesRoches, David W., Auto-adapting multi-tier cache.
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  4. Ballew, James D.; Early, Gary R., Coupling processors to each other for high performance computing (HPC).
    상세보기
  5. Yip, Michael; Shah, Sunil P.; Ragonese, Michelle M., Ethernet automatic protection switching.
    상세보기
  6. Davidson,Shannon V., Fault tolerance and recovery in a high-performance computing (HPC) system.
    상세보기
  7. Ballew, James D.; Early, Gary R., High performance computing (HPC) node having a plurality of switch coupled processors.
    상세보기
  8. Dellacona, Richard, High speed fault tolerant mass storage network information server.
    상세보기
  9. Dellacona,Richard, High speed information processing and mass storage system and method, particularly for information and application servers.
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  10. Jeddeloh, Joseph M., Memory hub and method for memory system performance monitoring.
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  11. Jeddeloh,Joseph M., Memory hub and method for memory system performance monitoring.
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  12. Jeddeloh,Joseph M., Memory hub and method for memory system performance monitoring.
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  13. Jeddeloh, Joseph M., Memory hub tester interface and method for use thereof.
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  14. Jeddeloh,Joseph M., Memory hub tester interface and method for use thereof.
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  15. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Method and apparatus for detecting MPLS network failures.
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  16. Owens,Kenneth R.; Makam,Srinivas V.; Huang,Changcheng; Sharma,Vishal, Method and apparatus for detecting MPLS network failures.
    상세보기
  17. Goodrum Alan L. ; Autor Jeffrey S. ; Culley Paul R. ; Miller Joseph P. ; Tavallaei Siamak ; Basile Barry P. ; Richard Elizabeth A. ; Rose Eric E., Method and apparatus for identifying faulty devices in a computer system.
    상세보기
  18. Zhou Jeffrey Xiaofeng ; Roden ; III Thomas Gilbert ; Bolduc Louis P. ; Peng Dar-Tzen ; Ernst James W. ; Younis Mohamed, Method and apparatus for managing redundant computer-based systems for fault tolerant computing.
    상세보기
  19. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Method for establishing an MPLS data network protection pathway.
    상세보기
  20. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Method for establishing an MPLS data network protection pathway.
    상세보기
  21. Ekrot Alexander C. (Humble TX) Singer James H. (Houston TX) Hemphill John M. (Spring TX) Autor Jeffrey S. (Houston TX) Galloway William C. (Houston TX) Alexander Dennis J. (Spring TX), Multi-server fault tolerance using in-band signalling.
    상세보기
  22. Ekrot Alexander C. ; Singer James H. ; Hemphill John M. ; Autor Jeffrey S. ; Galloway William C. ; Alexander Dennis J., Multi-server fault tolerance using in-band signalling.
    상세보기
  23. Dellacona Richard, Network information server.
    상세보기
  24. Davidson, Shannon V., On-demand instantiation in a high-performance computing (HPC) system.
    상세보기
  25. Hibino, Yoshihiko, Processing method and apparatus for communication path load distribution.
    상세보기
  26. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Protection/restoration of MPLS networks.
    상세보기
  27. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Protection/restoration of MPLS networks.
    상세보기
  28. Nation, George Wayne; Lippert, Gary M.; Kothamasu, Srinivasa Rao, Proxy responder for handling anomalies in a hardware system.
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  29. Roy Friedman IL; Kenneth P. Birman ; Srinivasan Keshav ; Werner Vogels, Reliable time delay-constrained cluster computing.
    상세보기
  30. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Reverse notification tree for data networks.
    상세보기
  31. Owens, Kenneth R.; Makam, Srinivas V.; Huang, Changcheng; Sharma, Vishal, Reverse notification tree for data networks.
    상세보기
  32. Owens,Kenneth R.; Makam,Srinivas V.; Huang,Changcheng; Sharma,Vishal, Reverse notification tree for data networks.
    상세보기
  33. Meares George Thomas ; Danford Edward Dale ; Hardy Bruce A., Rogue data packet removal method and apparatus.
    상세보기
  34. Richoux, Anthony N., Scheduling in a high-performance computing (HPC) system.
    상세보기
  35. Richoux,Anthony N., Scheduling in a high-performance computing (HPC) system.
    상세보기
  36. Ballew, James D.; Davidson, Shannon V.; Richoux, Anthony N., System and method for cluster management based on HPC architecture.
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  37. Ballew, James D.; Davidson, Shannon V.; Richoux, Anthony N., System and method for cluster management based on HPC architecture.
    상세보기
  38. Davidson, Shannon V.; Peterson, Robert J., System and method for computer cluster virtualization using dynamic boot images and virtual disk.
    상세보기
  39. Ballew, James D.; Davidson, Shannon V., System and method for detecting and managing HPC node failure.
    상세보기
  40. Jeddeloh, Joseph M., System and method for on-board diagnostics of memory modules.
    상세보기
  41. Jeddeloh,Joseph M., System and method for on-board diagnostics of memory modules.
    상세보기
  42. Jeddeloh,Joseph M., System and method for on-board diagnostics of memory modules.
    상세보기
  43. Jeddeloh, Joseph M., System and method for on-board timing margin testing of memory modules.
    상세보기
  44. Jeddeloh,Joseph M., System and method for on-board timing margin testing of memory modules.
    상세보기
  45. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
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  46. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
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  47. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
    상세보기
  48. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
    상세보기
  49. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
    상세보기
  50. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
    상세보기
  51. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
    상세보기
  52. Davidson, Shannon V.; Richoux, Anthony N., System and method for topology-aware job scheduling and backfilling in an HPC environment.
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