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Package for semiconductor elements having thermal dissipation means 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
  • H01L-023/12
  • H05K-005/00
출원번호 US-0000596 (1993-01-05)
우선권정보 JP-0324796 (1990-11-27)
발명자 / 주소
  • Kurokawa Yasuhiro (Tokyo JPX)
출원인 / 주소
  • Nec Corporation (Tokyo JPX 03)
인용정보 피인용 횟수 : 61  인용 특허 : 0

초록

A package for one or a plurality of semiconductor elements comprises a package substrate, at least one semiconductor element mounted on the package substrate having an active layer in a surface which faces away from the package substrate, a thin pliable electrically insulating resin layer applied to

대표청구항

A package for at least one semiconductor element, comprising: a package substrate, said at least one semiconductor element being mounted on the package substrate and having a first surface bonded to said substrate and a second surface facing away from the package substrate, said second surface havin

이 특허를 인용한 특허 (61)

  1. Batten ; Jr. L. Eugene ; Downie Patrick L. ; McCullock Dennis A., Assemblies of electronic devices and flexible containers therefor.
  2. Hoover,David S.; Petkie,Ronald R., CVD diamond enhanced microprocessor cooling system.
  3. Culnane Thomas Moran ; Gaynes Michael Anthony ; Seto Ping Kwong ; Shaukatullah Hussain, Chip carrier modules with heat sinks attached by flexible-epoxy.
  4. Hembree, David R., Chip on board and heat sink attachment methods.
  5. Hembree, David R., Chip on board and heat sink attachment methods.
  6. Hembree, David R., Chip on board and heat sink attachment methods.
  7. Hembree,David R., Chip on board and heat sink attachment methods.
  8. Hembree, David R., Chip on board with heat sink attachment and assembly.
  9. Liang Jimmy,TWX ; Cheng Johnny,TWX ; Kong Justin,TWX, Double-sided chip mount package.
  10. Deppisch, Carl L.; Houle, Sabina J.; Fitzgerald, Thomas J.; Dayton, Kristopher E.; Hua, Fay, Electronic assembly having a wetting layer on a thermally conductive heat spreader.
  11. Dishongh, Terrance J.; Churilla, Paul W.; Pullen, David H., Electronic assembly having an indium thermal couple.
  12. Kiefer James R., Electronic control with heat sink.
  13. Tantoush Mohammed, Enhanced heat sink attachment.
  14. Ramirez German ; Pedron ; Jr. Serafin Padilla, Exposed heat spreader with seal ring.
  15. McCullough,Kevin A., Heat sink assembly with overmolded carbon matrix.
  16. Bivona Kevin G. ; Coffin Jeffrey T. ; Drofitz ; Jr. Stephen S. ; Goldmann Lewis S. ; Interrante Mario J. ; Iruvanti Sushumna ; Sherif Raed A., Hermetic CBGA/CCGA structure with thermal paste cooling.
  17. Hockel, Jens Florian, Illumination device comprising a light-emitting diode.
  18. Xiao, Xu-Hua; Liu, Yi-San; He, Li, LED lamp.
  19. Bhatia, Rakesh; DiStefano, Eric, Low thermal resistance interface for attachment of thermal materials to a processor die.
  20. Berard, Alan M.; Hughes, John A.; Sturcken, Keith K.; Whalen, Timothy, Method and apparatus for cooling electonic components.
  21. Frank Louis Pompeo ; Alain A. Caron CA; Jeffrey Thomas Coffin ; Jeffrey Allen Zitz, Method for direct attachment of a chip to a cooling member.
  22. Too, Seah Sun; Khan, Mohammad; Hayward, James; Diep, Jacquana, Method of integrated circuit packaging.
  23. Ma, Qing; Mu, Xiao-Chun; Vu, Quat T., Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby.
  24. Ma, Qing; Mu, Xiao-Chun; Vu, Quat T., Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby.
  25. Qing Ma ; Xiao-Chun Mu ; Quat T. Vu, Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby.
  26. David R. Hembree, Methodology of removing misplaced encapsulant for attachment of heat sinks in a chip on board package.
  27. David R. Hembree, Methodology of removing misplaced encapsulant for attachment of heat sinks in a chip on board package.
  28. Garcia,Jason A., Methods and apparatuses for microelectronic assembly having a material with a variable viscosity around a MEMS device.
  29. Vu,Quat T.; Li,Jian; Towle,Steven, Microelectronic substrates with integrated devices.
  30. Sun, Shih-Hao, Package carrier and manufacturing method thereof.
  31. Gordon, David Scott; Schlichtmann, Michael Ray; Boeshans, Brian Frederick; Jacobson, Jon Thomas, Reconfigurable heat sink assembly.
  32. Akram,Salman, Removing heat from integrated circuit devices mounted on a support structure.
  33. Salman Akram, Removing heat from integrated circuit devices mounted on a support structure.
  34. Takahashi, Kouichi; Kasai, Kenichi; Daikoku, Takahiro; Uda, Takayuki; Netsu, Toshitada; Yamaguchi, Takeshi; Matsushita, Takahiko; Maruyama, Osamu, Sealing structure for multi-chip module.
  35. Kitabatake, Makoto; Kusumoto, Osamu; Uchida, Masao; Takahashi, Kunimasa; Yamashita, Kenya, Semiconductor apparatus including power semiconductor device constructed by using wide band gap semiconductor.
  36. Gross Larry D. ; Cadovius Richard W.,CAX, Semiconductor cap.
  37. Lee Tien-Yu Tom ; Hause James Vernon, Semiconductor component having a semiconductor chip mounted to a chip mount.
  38. Mori, Shogo; Tamura, Shinobu; Yamauchi, Shinobu; Kuribayashi, Taizo, Semiconductor device.
  39. Shinohara, Toshiaki, Semiconductor device.
  40. Ando Hideko,JPX ; Kikuchi Hiroshi,JPX ; Sato Toshihiko,JPX ; Hayashida Tetsuya,JPX, Semiconductor device and manufacturing method thereof.
  41. Hideko Ando JP; Hiroshi Kikuchi JP; Toshihiko Sato JP; Tetsuya Hayashida JP, Semiconductor device and manufacturing method thereof.
  42. Zenzo Oda JP; Tadashi Komiyama JP; Toshinori Nakayama JP; Osamu Omori JP, Semiconductor device and method for manufacturing the same.
  43. Yano Keiichi,JPX ; Kimura Kazuo,JPX ; Asai Hironori,JPX ; Monma Jun,JPX ; Yamakawa Koji ; Endo Mitsuyoshi,JPX ; Osoguchi Hirohisa,JPX, Semiconductor device having a tab chip on a tape carrier with lead wirings provided on the tape carrier used as externa.
  44. Schneider Mark R. (San Jose CA) Trabucco Robert T. (Los Altos CA), Semiconductor device package fabrication method and apparatus.
  45. Joshi, Rajeev; Sapp, Steven, Semiconductor die package with improved thermal and electrical performance.
  46. Chun Dong-Seok,KRX, Semiconductor package and method for fabricating same.
  47. Edwards David Linn ; Sherif Raed A. ; Toy Hilton T. ; Farooq Shaji ; Coico Patrick Anthony, Semiconductor package with low strain seal.
  48. Theuss, Horst; Stadler, Bernd, Sensor module.
  49. Theuss, Horst; Stadler, Bernd, Sensor module.
  50. Saxler, Adam William, Silicon carbide layer on diamond substrate for supporting group III nitride heterostructure device.
  51. Saxler, Adam William, Silicon carbide on diamond substrates and related devices and methods.
  52. Andros Frank E. ; Gaynes Michael A. ; Shaukatullah Hussain ; Storr Wayne R., Structure for removably attaching a heat sink to surface mount packages.
  53. Pinneo, John M., Thermal management components.
  54. Ettehadieh Ehsan ; Kaul Sunil ; Malladi Dev, Thermal management enhancements for cavity packages.
  55. Too, Seah Sun; Liau, Hsiang Wan; Kirkland, Janet; Tan, Tek Seng; Touzelbaev, Maxat; Master, Raj N., Void reduction in indium thermal interface material.
  56. Too, Seah Sun; Liau, Hsiang Wan; Kirkland, Janet; Tan, Tek Seng; Touzelbaev, Maxat; Master, Raj N., Void reduction in indium thermal interface material.
  57. Saxler, Adam William, Wafer precursor prepared for group III nitride epitaxial growth on a composite substrate having diamond and silicon carbide layers, and semiconductor laser formed thereon.
  58. Saxler, Adam William, Wide bandgap device having a buffer layer disposed over a diamond substrate.
  59. Garcia, Jason A., Wirebonded microelectronic packages including heat dissipation devices for heat removal from active surfaces thereof.
  60. Atwood Eugene R. ; Benenati Joseph A. ; Dankelman James J. ; Quinones Horatio ; Puttlitz Karl J. ; Kastberg Eric J., Zero force heat sink.
  61. Atwood Eugene R. ; Benenati Joseph A. ; Dankelman James J. ; Quinones Horatio ; Puttlitz Karl J. ; Kastberg Eric J., Zero force heat sink.
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