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ESD protection structure using LDMOS diodes with thick copper interconnect 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-027/085
출원번호 US-0333407 (1994-11-02)
발명자 / 주소
  • Efland Taylor R. (Richardson TX) Cotton Dave (Plano TX) Skelton Dale J. (Plano TX)
출원인 / 주소
  • Texas Instruments Incorporated (Dallas TX 02)
인용정보 피인용 횟수 : 158  인용 특허 : 0

초록 ▼

An interconnection structure and method for a multiple zener diode ESD protectoin circuit for power semiconductor devices. A plurality of lateral Zener diodes is formed. Each device is formed of a plurality of cathode and anode diffusion regions to be coupled together to form the cathode and anode o

대표청구항 ▼

An ESD protection circuit for LDMOS devices, comprising: a gate input for coupling to the gate terminal of an LDMOS transistor; a reference voltage input for coupling to a reference voltage; and a plurality of zener diodes serially coupled between said gate input and said reference voltage input, ea

이 특허를 인용한 특허 (158)

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