[특허]Disk array controller having internal protocol for sending address/transfer count information during first/second load c

Disk array controller having internal protocol for sending address/transfer count information during first/second load c 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-007/22
출원번호	US-0263018 (1994-06-20)
발명자 / 주소	Callison Ryan A. (Spring TX) Chandler Gregory T. (Houston TX) Grieff Thomas W. (Spring TX)
출원인 / 주소	Compaq Computer Corp. (Houston TX 02)
인용정보	피인용 횟수 : 54 인용 특허 : 0

초록 ▼

A disk array controller board which utilizes an EISA bus master which is a slave on its internal data bus to allow an advanced drive array controller chip (ADAC) to operate as a master. The ADAC is connected to transfer buffer RAM. The protocol of the internal data bus provides for a cycle to load a host memory address into the bus slave, to provide transfer count information and slave specific information and for a series of data transfer cycles. The local processor is connected to the EISA bus master and the ADAC to control operations and to provide certain information. The ADAC is controlled by structures referred to as command descriptor blocks (CDBs). Each CDB includes information which describes the various addresses, control bits and functional bits used by the ADAC to perform its transfer operations. The local processor directly writes and deposits data forming a CDB into the transfer buffer RAM. The ADAC obtains the CDB, loads the data into registers and then performs operations according to the information contained in these registers until a transfer is done. The ADAC itself performs operations, including automatic stripe scattering and gathering to develop contiguous host memory fields from striped array data. A series of CDBs can be chained so that a complex series of tasks can be developed. In one variation a string of CDBs is developed to transfer data but some data is transferred to the bit bucket, while other data is actually transferred.

대표청구항 ▼

A disk drive array controller for use with a plurality of disk drives forming an array and for installation in a host computer, the disk drive array controller comprising: local processor means for controlling operation of the disk drive array controller; buffer memory means for temporarily storing disk drive and command data; means for transferring data between the disk drives and said buffer memory means, said means connected to said local processor means for receiving control information; and means for transferring data between said buffer memory means and the host computer, said means including: a bus for transferring host address information and data; bus master means connected to said bus and said buffer memory means for providing host address information to said bus and transferring data between said bus and said buffer memory means, said bus master means including means for transferring a host memory address during a first bus slave load cycle, transfer count information during a second bus slave load cycle and data on following slave cycles and for providing a bus slave load signal with said first and second slave load cycles and a bus slave data request signal during said data cycles; and bus slave means connected to said bus and to the host computer for receiving said host address information add for transferring data between said bus and the host computer, said bus slave means including means for loading said host memory address value during said first cycle after receipt of said bus slave load signal, for loading said transfer counter during said second cycle after receipt of said bus slave load signal, for transferring data after receipt of said bus slave data request signal and for providing a bus slave acknowledge following receipt of each of said first and second slave load cycles and said data requests.

이 특허를 인용한 특허 (54)

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Riley, Dwight; Pettey, Christopher J., Device adapted to send information in accordance with a communication protocol.
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Riley,Dwight; Pettey,Christopher J., Device operating according to a communication protocol.
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Kim Jeh-won,KRX, Digital video disk ROM interfacing apparatus and method thereof.
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Kouloheris Jack Lawrence ; Kumar Manoj, Disk access method for delivering multimedia and video information on demand over wide area networks.
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Honda Kiyoshi (Yokohama JPX) Oeda Takashi (Yokohama JPX) Matsunami Naoto (Yokohama JPX) Arakawa Hiroshi (Yokohama JPX) Yoshida Minoru (Odawara JPX), Disk array control system.
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James Arthur McDonald ; John Peter Herz ; Mitchell Allen Altman ; William Edward Smith, III, Disk array controller, and components thereof, for use with ATA disk drives.
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McDonald, James Arthur; Herz, John Peter; Altman, Mitchell Allen; Smith, III, William Edward, Disk array system with controllers that automate host side of ATA interface.
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Brinkmann, Jr., Hubert E.; Callison, Ryan A., Dynamic routing of data across multiple data paths from a source controller to a destination controller.
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Pettey,Christopher J.; Riley,Dwight, High speed peripheral interconnect apparatus, method and system.
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Riley, Dwight; Pettey, Christopher J., High speed peripheral interconnect apparatus, method and system.
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McDonald James Arthur ; Herz John Peter ; Altman Mitchell Allen ; Smith ; III William Edward, High-performance bus architecture for disk array system.
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Byrne, Richard J.; Tjandra, Silvester; Goh, Eu Gene, High-speed redundant disk controller methods and systems.
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Chisholm Douglas Roderick ; Hoch Gary ; Lee Timothy Vincent ; McNeill ; Jr. Andrew Boyce ; Wachtel Ed, Information handling system for transfer of command blocks to a local processing side without local processor intervent.
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Wooten David R., Linked lists of transfer descriptors scheduled at intervals.
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Christensen, Daniel D.; Dienstbier, Steven L., Linking device in a process control system that allows the formation of a control loop having function blocks in a controller and in field devices.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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연합인증

Disk array controller having internal protocol for sending address/transfer count information during first/second load c 원문보기

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연합인증

Disk array controller having internal protocol for sending address/transfer count information during first/second load c 원문보기

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이 특허를 인용한 특허 (54)

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