$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Removal of field and embedded metal by spin spray etching 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/00
출원번호 US-0375054 (1995-01-19)
발명자 / 주소
  • Contolini Robert J. (Pleasanton CA) Mayer Steven T. (San Leandro CA) Tarte Lisa A. (Livermore CA)
출원인 / 주소
  • The United States of America as represented by The United States Department of Energy (Washington DC 06)
인용정보 피인용 횟수 : 61  인용 특허 : 0

초록

A process of removing both the field metal, such as copper, and a metal, such as copper, embedded into a dielectric or substrate at substantially the same rate by dripping or spraying a suitable metal etchant onto a spinning wafer to etch the metal evenly on the entire surface of the wafer. By this

대표청구항

A process for uniformly removing metal from a metal surface located on a substrate surface and from a metal surface located above metal containing trenches formed in the substrate for producing an essentially planar surface across the substrate and the metal containing trenches therein, comprising:

이 특허를 인용한 특허 (61)

  1. Ganesan, Kousik; Ghongadi, Shanthinath; Majid, Tariq; Labrie, Aaron; Mayer, Steven T., Apparatus and method for edge bevel removal of copper from silicon wafers.
  2. Ganesan, Kousik; Ghongadi, Shantinath; Majid, Tariq; Labrie, Aaron; Mayer, Steven T., Apparatus and method for edge bevel removal of copper from silicon wafers.
  3. Kwag Gyu-hwan,KRX ; Hwang Kyung-seuk,KRX, Apparatus for wafer treatment for the manufacture of semiconductor devices.
  4. Briggs, Benjamin D.; Huang, Elbert E.; Nogami, Takeshi; Patlolla, Raghuveer R.; Peethala, Cornelius B.; Rath, David L., Barrier planarization for interconnect metallization.
  5. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  6. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  7. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  8. Reid, Jonathan D.; Webb, Eric G.; Minshall, Edmund B.; Kepten, Avishai; Stowell, R. Marshall; Mayer, Steven T., Capping before barrier-removal IC fabrication method.
  9. Yu, Cheng-Po; Yu, Cheng-Hung, Circuit board and manufacturing method thereof.
  10. Mayer Steven T. ; Russo Carl ; Patton Evan, Edge bevel removal of copper from silicon wafers.
  11. Mayer, Steven T.; Varadarajan, Seshasayee; McCutcheon, Andrew J., Edge bevel removal of copper from silicon wafers.
  12. Mayer, Steven T.; Varadarajan, Seshasayee; Preston, Douglas A., Edge bevel removal of copper from silicon wafers.
  13. Henri, Jon; Meinhold, Henner; Gage, Christopher; Doble, Dan, Edge removal of films using externally generated plasma species.
  14. Toshiaki Yoshikawa JP; Makoto Kameyama JP; Junri Ishikura JP, Electrode plate, liquid crystal device and production thereof.
  15. Mayer Steven T. ; Contolini Robert J., Electroplanarization of large and small damascene features using diffusion barriers and electropolishing.
  16. Mayer Steven T. ; Alexy John B. ; Feng Jinbin, Etchant mixing system for edge bevel removal of copper from silicon wafers.
  17. Koos, Daniel A.; Mayer, Steven T.; Park, Heung L.; Cleary, Timothy Patrick; Mountsier, Thomas, Fabrication of semiconductor interconnect structure.
  18. Mayer, Steven T.; Koos, Daniel A.; Webb, Eric, Fabrication of semiconductor interconnect structure.
  19. Mayer, Steven T.; Koos, Daniel A.; Webb, Eric, Fabrication of semiconductor interconnect structure.
  20. Ulrich Bruce Dale ; Nguyen Tue ; Kobayashi Masato, Low temperature system and method for CVD copper removal.
  21. Feng, Jingbin; LaBrie, Aaron; Ganesan, Kousik, Magnetically actuated chuck for edge bevel removal.
  22. Mayer, Steven T.; Drewery, John S., Method and apparatus for uniform electropolishing of damascene IC structures by selective agitation.
  23. Mayer, Steven T.; Contolini, Robert J.; Broadbent, Eliot K.; Drewery, John S., Method and apparatus for uniform electropolishing of damascene ic structures by selective agitation.
  24. Reid, Jonathan David, Method for electrochemical planarization of metal surfaces.
  25. Koos,Daniel A.; Mayer,Steven T.; Park,Heung L.; Cleary,Timothy Patrick; Mountsier,Thomas, Method for fabrication of semiconductor interconnect structure with reduced capacitance, leakage current, and improved breakdown voltage.
  26. Mayer,Steven T.; Reid,Jonathan D.; Rea,Mark L.; Emesh,Ismail T.; Meinhold,Henner W.; Drewery,John S., Method for planar electroplating.
  27. Lee, Pei-Ing; Wu, Chang Rong; Ho, Tzu En; Chen, Yi-Nan; Su, Hsien Wen, Method for shallow trench isolation fabrication and partial oxide layer removal.
  28. Jaso Mark Anthony, Method of chemically mechanically polishing an electronic component using a non-selective ammonium persulfate slurry.
  29. Yu, Cheng-Po, Method of making a circuit structure of a circuit board.
  30. Kwag Gyu-hwan,KRX ; Ko Se-jong,KRX ; Hwang Kyung-seuk,KRX ; Gil Jun-ing,KRX ; Park Sang-o,KRX ; Kim Dae-hoon,KRX ; Chon Sang-moon,KRX ; Chung Ho-Kyoon,KRX, Method of manufacturing semiconductor devices, etching composition for manufacturing semiconductor devices, and semiconductor devices made using the method.
  31. Gyu-hwan Kwag KR; Se-jong Ko KR; Kyung-seuk Hwang KR; Jun-ing Gil KR; Sang-o Park KR; Dae-hoon Kim KR; Sang-moon Chon KR; Ho-Kyoon Chung KR, Method of manufacturing semiconductor devices, etching compositions for manufacturing semiconductor devices, and semiconductor devices made using this method.
  32. Kwag Gyu-hwan,KRX ; Ko Se-jong,KRX ; Hwang Kyung-seuk,KRX ; Gil Jun-ing,KRX ; Park Sang-o,KRX ; Kim Dae-hoon,KRX ; Chon Sang-moon,KRX ; Chung Ho-Kyoon,KRX, Method of manufacturing semiconductor devices, etching compositions for manufacturing semiconductor devices, and semiconductor devices thereby.
  33. Chou,Shih Wei; Tsai,Minghsing; Shue,Winston, Method to remove copper without pattern density effect.
  34. Reid, Jonathan; Varadarajan, Sesha; Emekli, Ugur, Methods and apparatus for depositing copper on tungsten.
  35. Reid, Jonathan; Varadarajan, Sesha; Emekli, Ugur, Methods and apparatus for depositing copper on tungsten.
  36. Mayer, Steven T.; Porter, David W., Modulated metal removal using localized wet etching.
  37. Mayer, Steven T.; Svirchevski, Julia; Drewery, John Stephen, Pad-assisted electropolishing.
  38. Mayer, Steven T.; Drewery, John Stephen; Webb, Eric G., Photoresist-free metal deposition.
  39. Basol, Bulent M., Plating method and apparatus for controlling deposition on predetermined portions of a workpiece.
  40. Basol, Bulent M., Plating method and apparatus for controlling deposition on predetermined portions of a workpiece.
  41. Basol, Bulent M., Plating methods for low aspect ratio cavities.
  42. Gupta Anand ; Karlsrud Chris ; Gopalan Periya, Post-CMP wet-HF cleaning station.
  43. Gupta Anand ; Karlsrud Chris ; Gopalan Periya ; Trojan Daniel R. ; Cunnane Jeffrey B. ; MacErnie Jon R., Post-CMP wet-HF cleaning station.
  44. Kruwinus,Hans Jurgen; Sellmer,Reinhard, Process for planarizing substrates of semiconductor technology.
  45. Karen R. Caldwell, Process for preparation of thin metallic foils and organic thin-film-metal structures.
  46. Mayer, Steven T.; Porter, David W., Reduced isotropic etchant material consumption and waste generation.
  47. Mayer, Steven T.; Porter, David W., Reduced isotropic etchant material consumption and waste generation.
  48. Mayer, Steven T.; Drewery, John S.; Hill, Richard S.; Archer, Timothy M.; Kepten, Avishai, Selective electrochemical accelerator removal.
  49. Mayer, Steven T.; Drewery, John; Hill, Richard S.; Archer, Timothy; Kepten, Avishai, Selective electrochemical accelerator removal.
  50. Mayer, Steven T.; Stowell, Marshall R.; Drewery, John S.; Hill, Richard S.; Archer, Timothy M.; Kepten, Avishai, Selective electrochemical accelerator removal.
  51. Olgado, Donald J. K.; Tepman, Avi; Lubomirsky, Dmitry; Webb, Timothy R., System for planarizing metal conductive layers.
  52. Amrich, Mark; Rolfe, Jonathan; Buturlia, Joseph; Lynch, Robert, Textured surface having undercut micro recesses in a surface.
  53. Mayer, Steven T.; Rea, Mark L.; Hill, Richard S.; Kepten, Avishai; Stowell, R. Marshall; Webb, Eric G., Topography reduction and control by selective accelerator removal.
  54. Mayer, Steven T.; Rea, Mark L.; Hill, Richard S.; Kepten, Avishai; Stowell, R. Marshall; Webb, Eric G., Topography reduction and control by selective accelerator removal.
  55. Mayer, Steven T.; Taatjes, Steve; McCutcheon, Andy; Schall, Jim; Feng, Jinbin, Wafer chuck for use in edge bevel removal of copper from silicon wafers.
  56. Mayer, Steven T.; Taatjes, Steve; McCutcheon, Andy; Schall, Jim; Feng, Jingbin, Wafer chuck for use in edge bevel removal of copper from silicon wafers.
  57. Stephens, Craig P.; Kanetomi, Matt; Richardson, Joseph; Veazey, Chris; LaBrie, Aaron, Wafer chuck with aerodynamic design for turbulence reduction.
  58. Uzoh Cyprian Emeka, Wafer edge deplater for chemical mechanical polishing of substrates.
  59. Mayer, Steven T.; Webb, Eric G.; Porter, David W., Wet etching methods for copper removal and planarization in semiconductor processing.
  60. Mayer, Steven T.; Webb, Eric; Porter, David W., Wet etching methods for copper removal and planarization in semiconductor processing.
  61. Mayer, Steven T.; Webb, Eric; Porter, David W., Wet etching methods for copper removal and planarization in semiconductor processing.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로