[특허]Power MOSFET with overcurrent and over-temperature protection

Power MOSFET with overcurrent and over-temperature protection 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H02H-003/08
출원번호	US-0121288 (1993-09-14)
발명자 / 주소	Nadd Bruno C. (Puyvert FRX)
출원인 / 주소	International Rectifier Corporation (El Segundo CA 02)
인용정보	피인용 횟수 : 30 인용 특허 : 0

초록 ▼

A power integrated circuit is pin-compatible with a three-terminal power MOSFET and contains integrated circuits to turn off the device in the event of an overcurrent or an over-temperature condition. Control power voltage Vcc is applied through a first MOSFET connected between the gate pin and the gate electrode of the power device. A second control MOSFET is connected across the power device gate and source electrodes. The first control MOSFET is turned off and the second control MOSFET is turned on in response to a fault condition. The turn off of the first MOSFET limits the current sinked by the gate pin. A novel boot strap circuit is disclosed which permits the use of all N channel MOSFETs with an N channel power device, and a novel trimmable temperature shutdown circuit is provided. An integrated bipolar transistor is also integrated into the chip to prevent conduction of the P well/N epi diode formed in the device substrate.

대표청구항 ▼

A MOSgated semiconductor power device having a fault condition responsive control circuit integrated into the same die which contains a power section for said device; said device comprising a semiconductor die having first and second main electrodes and a gate electrode for controlling the conduction of current between said first and second main electrodes; said device having at least first, second and third connection pins; said first and second pins connected to said first and second main electrodes respectively; said fault condition responsive control circuit being formed in at least one separate well area within said semiconductor die; said fault condition responsive control circuit being operable to turn off a signal to said gate electrode in response to a predetermined fault condition; said fault condition responsive control circuit having an input terminal for a control voltage Vcc needed for the biasing and operation of the components of said fault condition responsive control circuit; a first control MOSFET connected between said third connection pin and said gate electrode and a second control MOSFET connected between said gate electrode and one of said first and second main electrodes; said input terminal of said fault condition responsive control circuit being connected to the voltage at the node between said third pin and said first control MOSFET; said first control MOSFET being turned on and said second control MOSFET being turned off during the time that said MOSgated semiconductor power device is in normal conduction; said fault condition responsive control circuit being operable to turn off said first control MOSFET and turn on said second control MOSFET in response to a monitored fault condition.

이 특허를 인용한 특허 (30)

Michel, Hartmut; Pluntke, Christian; Thanner, Manfred; Bireckoven, Bernd, Circuit for protection from excess temperature.
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Gillberg James E. ; Giordano Raymond L., Current limited, thermally protected, power device.
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Nadd Bruno C.,FRX, Fast switching smartfet.
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Nadd, Bruno C.; Thiery, Vincent; de Frutos, Xavier; Lee, Chik Yam, H-bridge drive utilizing a pair of high and low side MOSFETs in a common insulation housing.
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Baliga, Bantval Jayant, Integrated circuit power devices having junction barrier controlled schottky diodes therein.
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Balakrishnan, Balu; Djenguerian, Alex B.; Bircan, Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balakrishnan, Balu; Djenguerian, Alex B.; Bircan, Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balakrishnan, Balu; Djenguerian, Alex B.; Bircan, Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balakrishnan, Balu; Djenguerian, Alex B.; Bircan, Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balakrishnan, Balu; Djenguerian, Alex B.; Bircan, Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balakrishnan,Balu; Dienguerian,Alex B.; Bircan,Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balakrishnan,Balu; Djenguerian,Alex B.; Bircan,Erdem, Method and apparatus providing final test and trimming for a power supply controller.
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Balu Balakrishnan ; Alex B. Djenguerian ; Erdem Bircan, Method and apparatus providing final test and trimming for a power supply controller.
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Kim, Hyun-Tak; Lee, Yong-Wook; Kim, Bong-Jun; Yun, Sun-Jin, Method and circuit for controlling radiant heat of transistor using metal-insulator transition device.
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Ball, Alan R.; Robb, Stephen P., Method for regulating temperature.
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Ball, Alan R.; Robb, Stephen P., Method for regulating temperature and circuit therefor.
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Beier, Robert Carl; Notarantonio, Raymond Joseph, Methods and systems for protection from over-stress.
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Baliga,Bantval Jayant, Methods of forming power semiconductor devices having laterally extending base shielding regions.
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Verhaege, Koen Gerard Maria; Mergens, Markus Paul Josef; Russ, Cornelius Christian; Armer, John; Jozwiak, Phillip Czeslaw, Multi-finger current ballasting ESD protection circuit and interleaved ballasting for ESD-sensitive circuits.
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Chiang, Chin-Tsai, Over-voltage and over-temperature detecting circuit.
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Hosokawa Akio,JPX, Overcurrent sensing circuit for power MOS field effect transistor.
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Baliga, Bantval Jayant, Power semiconductor devices having laterally extending base shielding regions that inhibit base reach-through.
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Yanagigawa, Hiroshi; Kojima, Masaki, Power switch circuit having variable resistor coupled between input terminal and output transistor and changing its resistance based on state of output transistor.
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Nadd Bruno C. (Puyvert FRX), Protected three-pin mosgated power switch with separate input reset signal level.
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Guo,Sam Yonghon, Protection circuit for digital power module.
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Baliga, Bantval Jayant, Vertical power devices having retrograded-doped transition regions and insulated trench-based electrodes therein.
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Baliga, Bantval Jayant, Vertical power devices having retrograded-doped transition regions therein.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
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연합인증

Power MOSFET with overcurrent and over-temperature protection 원문보기

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Power MOSFET with overcurrent and over-temperature protection 원문보기

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이 특허를 인용한 특허 (30)

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