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Implementation of redundancy on a programmable logic device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-019/177
출원번호 US-0147601 (1993-11-04)
발명자 / 주소
  • Cliff Richard G. (Milpitas CA) Raman Rina (Fremont CA) Reddy Srinivas T. (Santa Clara CA)
출원인 / 주소
  • Altera Corporation (San Jose CA 02)
인용정보 피인용 횟수 : 81  인용 특허 : 0

초록 ▼

An improved architecture and method of operation for providing redundancy in programmable logic devices. Spare columns or rows of logic blocks 115 and switch boxes 140 are employed to replace columns or rows of logic blocks containing one or more defective logic blocks. Associated logic enable the d

대표청구항 ▼

A programmable logic device capable of remedying logic block defects, said programmable logic device comprising: a plurality of logic blocks disposed in an array format forming rows and columns, each block performing user-specified logic functions; a programmable interconnect for selectively connect

이 특허를 인용한 특허 (81)

  1. Chi, Shyh-An, 3D IC structure and method.
    상세보기
  2. Chi, Shyh-An, 3D IC structure and method.
    상세보기
  3. Vadi,Vasisht Mantra, Adjustable global tap voltage to improve memory cell yield.
    상세보기
  4. Carlson, David A., Apparatus and method for repairing logic blocks.
    상세보기
  5. Carlson,David A., Apparatus and method for repairing logic blocks.
    상세보기
  6. Trimberger,Steven M.; Bapat,Shekhar; Wells,Robert W.; Patrie,Robert D.; Lai,Andrew W., Application-specific methods for testing molectronic or nanoscale devices.
    상세보기
  7. Bapat,Shekhar; Wells,Robert W.; Patrie,Robert D.; Lai,Andrew W., Application-specific methods useful for testing look up tables in programmable logic devices.
    상세보기
  8. Wells, Robert W.; Ling, Zhi-Min; Patrie, Robert D.; Tong, Vincent L.; Cho, Jae; Toutounchi, Shahin, Application-specific testing methods for programmable logic devices.
    상세보기
  9. Wells, Robert W.; Ling, Zhi-Min; Patrie, Robert D.; Tong, Vincent L.; Cho, Jae; Toutounchi, Shahin, Application-specific testing methods for programmable logic devices.
    상세보기
  10. Koob, John Conrad; Sung, Raymond Jit-Hung; Brandon, Tyler Lee; Elliot, Duncan George, Arrayed processing element redundancy architecture.
    상세보기
  11. Blumberg,Marc R.; Kalscheur,Michael J.; Palitto,Matteo; Sturm,Douglas W.; Pranaitis, Jr.,William F., Back out provision for failed programmable hardware update.
    상세보기
  12. Trimberger,Stephen M.; Lesea,Austin H., FPGA with time-multiplexed interconnect.
    상세보기
  13. Marshall Alan,GBX ; Stansfield Anthony,GBX ; Vuillemin Jean,FRX, Field programmable processor arrays.
    상세보기
  14. Marshall Alan,GBX ; Stansfield Anthony,GBX ; Vuillemin Jean,FRX, Field programmable processor devices.
    상세보기
  15. Scotzniovsky, Stefan; Cory, Bruce; Young, Charles Chew-Yuen; Tamasi, Anthony M.; Van Dyke, James M.; Montrym, John S.; Treicher, Sean J., Functional component compensation reconfiguration system and method.
    상세보기
  16. How, Dana; D'Souza, Godfrey P.; Wing, Malcolm J.; Murphy, Colin N.; Jangity, Arun, High-bandwidth interconnect network for an integrated circuit.
    상세보기
  17. Marshall, Alan David; Stansfield, Anthony; Vuillemin, Jean, Implementation of multipliers in programmable arrays.
    상세보기
  18. Zhu, Timothy; Dunn, David; Spurlock, Randy; Spacie, Thomas, Input/output request packet handling techniques by a device specific kernel mode driver.
    상세보기
  19. Van Dyke, James M.; Montrym, John S.; Nagy, Michael B.; Treichler, Sean J., Integrated circuit configuration system and method.
    상세보기
  20. Chi, Shyh-An, Integrated circuit die stack.
    상세보기
  21. Krishna Rangasayee, Integrated circuit incorporating a programmable cross-bar switch.
    상세보기
  22. Rangasayee Krishna, Integrated circuit incorporating a programmable cross-bar switch.
    상세보기
  23. Guzman, Mario E.; Lane, Christopher F., Integrated circuit with redundancy.
    상세보기
  24. Ayodhyawasi, Manuj; Digari, Kailash, Interconnect structure and method in programmable devices.
    상세보기
  25. Duron, Mike Conrad; Faust, Robert Allan; Gray, Forrest Clifton; Mahajan, Ajay Kumar; Miles, Glenn Rueban, JTAGchain bus switching and configuring device.
    상세보기
  26. Duron,Mike Conrad; Faust,Robert Allan; Gray,Forrest Clifton; Mahajan,Ajay Kumar; Miles,Glenn Rueban, JTAGchain bus switching and configuring device.
    상세보기
  27. Aida, Nobuyoshi; Murakami, Hiroshi, Logic integrated circuit having dynamic substitution function, information processing apparatus using the same, and dynamic substitution method of logic integrated circuit.
    상세보기
  28. Ku, Ting Sheng; Newcomb, Russell; Wagner, Barry A.; Shaikh, Ashfaq R.; Simms, William B., Loopback configuration for bi-directional interfaces.
    상세보기
  29. Lane Christopher F. (Campbell CA) Reddy Srinivas T. (Santa Clara CA) Wang Bonnie I. (Cupertino CA), Means and apparatus to minimize the effects of silicon processing defects in programmable logic devices.
    상세보기
  30. Lane Christopher F. ; Reddy Srinivas T. ; Wang Bonnie I-Keh, Means and apparatus to minimize the effects of silicon processing defects in programmable logic devices.
    상세보기
  31. Hassoun,Marwan M.; Robinson,Moises E.; Tetzlaff,David E., Method and apparatus for a redundant transceiver architecture.
    상세보기
  32. Stansfield, Anthony; Marshall, Alan David; Vuillemin, Jean, Method and apparatus for providing instruction streams to a processing device.
    상세보기
  33. Stansfield, Anthony; Marshall, Alan David; Vuillemin, Jean, Method and apparatus for varying instruction streams provided to a processing device using masks.
    상세보기
  34. Danskin, John M.; Tamasi, Anthony Michael, Method and system for implementing fragment operation processing across a graphics bus interconnect.
    상세보기
  35. Acocella, Dominic; McDonald, Timothy J.; Gimby, Robert W.; Kong, Thomas H., Method and system for remapping processing elements in a pipeline of a graphics processing unit.
    상세보기
  36. Ling, Zhi-Min; Cho, Jae; Wells, Robert W.; Johnson, Clay S.; Davis, Shelly G., Method of using partially defective programmable logic devices.
    상세보기
  37. Trimberger,Stephen M., Methods and circuits for dedicating a programmable logic device for use with specific designs.
    상세보기
  38. Trimberger,Stephen M., Methods for using defective programmable logic devices by customizing designs based on recorded defects.
    상세보기
  39. Trimberger, Stephen M., Methods of enabling the use of a defective programmable device.
    상세보기
  40. Trimberger, Stephen M., Methods of enabling the validation of an integrated circuit adapted to receive one of a plurality of configuration bitstreams.
    상세보기
  41. Trimberger, Stephen M.; Ehteshami, Babak, Methods of using one of a plurality of configuration bitstreams for an integrated circuit.
    상세보기
  42. Wells,Robert W.; Patrie,Robert D.; DeBaets,Andrew J., Methods of utilizing programmable logic devices having localized defects in application-specific products.
    상세보기
  43. Diamond, Michael B., Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits.
    상세보기
  44. Trimberger, Stephen M., Multiple bitstreams enabling the use of partially defective programmable integrated circuits while avoiding localized defects therein.
    상세보기
  45. Trimberger,Stephen M., Multiple bitstreams enabling the use of partially defective programmable integrated circuits while avoiding localized defects therein.
    상세보기
  46. Nguyen,Truong T.; Dahablania,Atul; Matthey,Olivier; Gmuender,John, Network interface device having bypass capability.
    상세보기
  47. Chambers Peter ; Shelton Roger Lee, Patch mechanism for allowing dynamic modifications of the behavior of a state machine.
    상세보기
  48. Ward, Derek, Programmable controller for use with monitoring device.
    상세보기
  49. Ward, Derek, Programmable logic controller and related electronic devices.
    상세보기
  50. Rangasayee Krishna ; Bielby Robert N., Programmable logic device architecture incorporating a dedicated cross-bar switch.
    상세보기
  51. Reddy Srinivas T. ; Mejia Manuel ; Lee Andy L. ; Pedersen Bruce B., Programmable logic device with redundant circuitry.
    상세보기
  52. Srinivas T. Reddy ; Manuel Mejia ; Andy L. Lee ; Bruce B. Pedersen, Programmable logic device with redundant circuitry.
    상세보기
  53. Réblewski, Frédéric; LePape, Olivier V., Reconfigurable circuit with redundant reconfigurable cluster(s).
    상세보기
  54. Réblewski,Frédéric, Reconfigurable circuit with redundant reconfigurable cluster(s).
    상세보기
  55. Alan David Marshall GB; Anthony Stansfield GB; Jean Vuillemin FR, Reconfigurable processor devices.
    상세보기
  56. McClintock Cameron ; Lee Andy L. ; Cliff Richard G., Redundancy circuitry for logic circuits.
    상세보기
  57. McClintock Cameron ; Lee Andy L. ; Cliff Richard G., Redundancy circuitry for logic circuits.
    상세보기
  58. McClintock Cameron ; Lee Andy L. ; Cliff Richard G., Redundancy circuitry for logic circuits.
    상세보기
  59. David E. Jefferson ; Srinivas T. Reddy, Redundancy circuitry for programmable logic devices with interleaved input circuits.
    상세보기
  60. Jefferson David E. ; Reddy Srinivas T., Redundancy circuitry for programmable logic devices with interleaved input circuits.
    상세보기
  61. Jefferson David E. ; Reddy Srinivas T., Redundancy circuitry for programmable logic devices with interleaved input circuits.
    상세보기
  62. Ngai,Tony K.; Wong,Jennifer; Lowe,Wayson J., Self-repairing redundancy for memory blocks in programmable logic devices.
    상세보기
  63. Diamond, Michael B., Semiconductor die micro electro-mechanical switch management method.
    상세보기
  64. Diamond, Michael B., Semiconductor die micro electro-mechanical switch management system and method.
    상세보기
  65. Toshikazu Nakamura JP; Yoshinori Okajima JP; Hiroyuki Sugamoto JP, Semiconductor memory device with efficient redundancy operation.
    상세보기
  66. Rao, Hari; Nousias, Ioannis; Khawam, Sami, Serial configuration of a reconfigurable instruction cell array.
    상세보기
  67. Trimberger,Stephen M., Structures and methods of overcoming localized defects in programmable integrated circuits by routing during the programming thereof.
    상세보기
  68. Diamond, Michael B.; Montrym, John S.; Van Dyke, James M.; Nagy, Michael B.; Treichler, Sean J., System and method for configuring semiconductor functional circuits.
    상세보기
  69. Van Dyke, James M.; Montrym, John S.; Nagy, Michael B.; Treichler, Sean J., System and method for increasing die yield.
    상세보기
  70. Diamond, Michael B.; Montrym, John S.; Van Dyke, James M.; Nagy, Michael B.; Treichler, Sean J., System and method for remotely configuring semiconductor functional circuits.
    상세보기
  71. Diamond, Michael B., System and method for testing and configuring semiconductor functional circuits.
    상세보기
  72. James MacArthur ; Timothy Lacey, Techniques and circuits for high yield improvements in programmable devices using redundant logic.
    상세보기
  73. MacArthur James ; Lacey Timothy M., Techniques and circuits for high yield improvements in programmable devices using redundant logic.
    상세보기
  74. MacArthur James ; Lacey Timothy, Techniques and circuits for high yield improvements in programmable devices using redundant routing resources.
    상세보기
  75. MacArthur James ; Lacey Timothy M., Techniques and circuits for high yield improvements in programmable devices using redundant routing resources.
    상세보기
  76. Chi, Shyh-An, Three dimensional integrated circuit connection structure and method.
    상세보기
  77. Chi, Shyh-An, Three dimensional integrated circuit connection structure and method.
    상세보기
  78. Trimberger,Stephen M., Utilizing multiple bitstreams to avoid localized defects in partially defective programmable integrated circuits.
    상세보기
  79. Trimberger, Stephen M., Utilizing multiple test bitstreams to avoid localized defects in partially defective programmable integrated circuits.
    상세보기
  80. Trimberger, Stephen M., Utilizing multiple test bitstreams to avoid localized defects in partially defective programmable integrated circuits.
    상세보기
  81. Trimberger,Stephen M., Utilizing multiple test bitstreams to avoid localized defects in partially defective programmable integrated circuits.
    상세보기

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