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Electronic package having improved wire bonding capability 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/06
  • H01L-023/10
출원번호 US-0450292 (1995-05-25)
발명자 / 주소
  • Hoffman Paul R. (Modesto CA) Brathwaite George A. (Hayward CA) Bui Doanh D. (Milpitas CA) Mahulikar Deepak (Madison CT)
출원인 / 주소
  • Olin Corporation (Manteca CA 02)
인용정보 피인용 횟수 : 44  인용 특허 : 0

초록

There is provided a base for an electronic package. The base includes a peripheral portion for a polymer adhesive and a central portion for one or more semiconductor devices. A lead support is adjacent the substrate and located between the peripheral portion and the central portion. When a polymer a

대표청구항

An electronic package base assembly, comprising: a substrate having a peripheral portion and a central portion; a polymer adhesive having a desired thickness bonded to said peripheral portion; and a rigid lead support adjacent said substrate and disposed between said polymer adhesive and said centra

이 특허를 인용한 특허 (44)

  1. Wisniewski, Andrew J., Alternate vent hole sealing method.
  2. Nelle, Peter; Stecher, Matthias, Apparatus and method configured to lower thermal stresses.
  3. Nelle, Peter; Stecher, Matthias, Apparatus and method configured to lower thermal stresses.
  4. Nelle, Peter; Stecher, Matthias, Apparatus and method configured to lower thermal stresses.
  5. Bauer, Michael; Woerner, Holger; Jerebic, Simon, Device including a housing for a semiconductor chip including leads extending into the housing.
  6. Joo, Sung Chul; Hussell, Christopher P., High brightness LED package.
  7. Joo, Sung Chul; Hussell, Christopher P., High brightness LED package.
  8. Hussell, Christopher P.; Joo, Sung Chul, High brightness light emitting diode (LED) packages, systems and methods with improved resin filling and high adhesion.
  9. Hussell, Christopher P., LED package with efficient, isolated thermal path.
  10. Ford B. Grigg ; Warren M. Farnworth, LOC semiconductor assembled with room temperature adhesive.
  11. Ford B. Grigg ; Warren M. Farnworth, LOC semiconductor assembled with room temperature adhesive.
  12. Grigg Ford B. ; Farnworth Warren M., LOC semiconductor assembled with room temperature adhesive.
  13. Grigg Ford B. ; Farnworth Warren M., LOC semiconductor assembled with room temperature adhesive.
  14. Grigg, Ford B.; Farnworth, Warren M., LOC semiconductor assembled with room temperature adhesive.
  15. Grigg, Ford B.; Farnworth, Warren M., LOC semiconductor assembled with room temperature adhesive.
  16. Wang, Chin-Fa; Hsieh, Wan-Jung; Hsu, Yu-Mei, Leadframe and semiconductor package having downset baffle paddles.
  17. Hussell, Christopher P.; Joo, Sung Chul, Light emitting device packages with improved heat transfer.
  18. Hussell, Christopher P.; Joo, Sung Chul; Pyles, Robert S., Light emitting device packages with improved heat transfer.
  19. Emerson, David T.; Hussell, Christopher P.; Joo, Sung Chul, Light emitting device packages, systems and methods.
  20. Hussell, Christopher P.; Emerson, David T.; Britt, Jeffrey C., Light emitting devices and methods.
  21. Emerson, David T.; Bergmann, Michael J.; Hussell, Christopher P., Light emitting diode (LED) devices, systems, and methods.
  22. Joo, Sung Chul; Hussell, Christopher P., Light emitting diode (LED) packages, systems, devices and related methods.
  23. Yeh, Wei-Yu; Ko, Pei-Wen; Sun, Chih-Hsuan; Fu, Hsueh-Hung, Light emitting diode carrier.
  24. Geoffrey Dearnaley ; Mark Van Dyke, Lubricious diamond-like carbon coatings.
  25. Robinson Peter W. ; Mahulikar Deepak ; Hoffman Paul R., Metal ball grid electronic package having improved solder joint.
  26. Dearnaley, Geoffrey; Van Dyke, Mark, Method for producing a lubricious amorphous carbon film.
  27. Peterson, Kenneth A.; Watson, Robert D., Method of fabricating a microelectronic device package with an integral window.
  28. Grigg, Ford B.; Farnworth, Warren M., Method of manufacturing LOC semiconductor assembled with room temperature adhesive.
  29. Grigg, Ford B.; Farnworth, Warren M., Method of manufacturing LOC semiconductor assembled with room temperature adhesive.
  30. Joo, Sung Chul; Hussell, Christopher P., Package for light emitting diode (LED) lighting.
  31. Dearnaley Geoffrey ; Lukezich Stephen J., Porous anodized aluminum surfaces sealed with diamond-like carbon coatings.
  32. Kim, Kwang Soo; Park, Ji Hyun; Lee, Young Ki; Choi, Seog Moon, Power module package and method for fabricating the same.
  33. Chou, Shih; Felstein, Steven R.; Lo, Ching P.; Huang, Daniel A.; Fanucchi, Richard; Mayhew, Gregory L.; Simanyi, Lydia H., Preparation of passivated chip-on-board electronic devices.
  34. Rodriguez Louis ; Dearnaley Geoffrey, Preventing radioactive contamination of porous surfaces.
  35. Yoshida, Hiroshi; Tojo, Tsuyoshi; Ozawa, Masafumi, Semiconductor device and package with high heat radiation effect.
  36. Hiroshi Yoshida JP; Tsuyoshi Tojo JP; Masafumi Ozawa JP, Semiconductor device package, and fabrication method thereof.
  37. Sean T. Crowley ; Bradley D. Boland, Semiconductor package having multiple dies with independently biased back surfaces.
  38. Kim Jin Sung,KRX, Semiconductor package substrate and ball grid array (BGA) semiconductor package using same.
  39. Hussell, Christopher P., Solid state lighting device.
  40. Hussell, Christopher P., Solid state lighting device.
  41. Hussell, Christopher P.; Abare, Amber C.; Reiherzer, Jesse Colin, Solid state lighting devices and methods.
  42. Fukushima, Daisuke, Surface mounting package.
  43. Crowley Sean Timothy ; Boland Bradley David, Thin leadframe-type semiconductor package having heat sink with recess and exposed surface.
  44. Suzuki, Shinsuke, Wire bonding method.
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