이 특허를 인용한 특허 (43)

1. Hickert George, Barrier layer to protect a ferroelectric capacitor after contact has been made to the capacitor electrode.

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2. Wu, Hui-Min; Wang, Ming-I; Wang, Kuan-Yu; Hsieh, Kun-Che; Huang, Chien-Hsin, Bond pad structure and fabricating method thereof.

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3. Maejima Yukihiko,JPX, Capacitor and method of manufacturing the same.

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4. Asano, Tetsuro; Hirai, Toshikazu; Higashino, Takayoshi; Hirata, Koichi; Sakakibara, Mikito, Compound semiconductor device with depletion layer stop region.

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5. Argos George ; Yamazaki Tatsuya,JPX, Dual-level metalization method for integrated circuit ferroelectric devices.

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6. Joseph D. Cuchiaro ; Carlos A. Paz de Araujo ; Larry D. McMillan, Ferroelectric integrated circuit having hydrogen barrier layer.

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7. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same.

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8. Cuchiaro, Joseph D.; Furuya, Akira; Paz de Araujo, Carlos A.; Miyasaka, Yoichi, Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same.

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9. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Ferroelectric integrated circuit with protective layer incorporating oxygen and method for fabricating same.

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10. Czabaj, Brian M.; Hart, III, James V.; Murphy, William J.; Nakos, James S., Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip.

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11. Czabaj, Brian M.; Hart, III, James V.; Murphy, William J.; Nakos, James S., Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip.

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12. Amiotti, Marco; Jung, Jae Hak; Boffito, Claudio, Integrated capacitive device with hydrogen degradable dielectric layer protected by getter layer.

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13. Cuchiaro, Joseph D.; Furuya, Akira; Paz de Araujo, Carlos A.; Miyasaka, Yoichi, Integrated circuit having self-aligned hydrogen barrier layer and method for fabricating same.

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14. Whitaker, Mark R.; Marentette, Leslie Joseph, Interrupt generation and acknowledgment for RFID.

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15. Whitaker, Mark R., Low power, low pin count interface for an RFID transponder.

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16. Yamagata Satoru,JPX ; Onishi Shigeo,JPX ; Kudo Jun,JPX, Manufacturing method of electrode.

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17. Ahn, Byoung Kwon; Park, Sung Hoon; Kim, Joon Ho, Method for fabricating a capacitor.

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18. Hopfner Joachim,DEX, Method for fabricating a semiconductor component.

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19. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Method for fabricating ferroelectric integrated circuits.

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20. Lee Kyeong Bock,KRX ; Jin Sung Gon,KRX, Method for forming barrier metal layer of semiconductor device.

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21. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Method of fabricating ferroelectric integrated circuit using dry and wet etching.

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22. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Method of fabricating ferroelectric integrated circuit using oxygen to inhibit and repair hydrogen degradation.

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23. Rika Shinohara JP; Atsuhiro Tsukune JP; Hiroshi Kudo JP, Method of making ferroelectric film with protective cover film against hydrogen and moisture.

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24. Yukihiko Maejima JP, Method of manufacturing a ferroelectric capacitor.

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25. Inomata, Daisuke, Method of manufacturing ferroelectric capacitor.

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26. Hartner, Walter; Schindler, Gunther; Kastner, Marcus; Dehm, Christine, Method of producing a ferroelectric semiconductor memory.

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27. Hong Kwon,KRX, Methods for fabricating high dielectric capacitors of semiconductor devices.

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28. Gabric,Zvonimir; Hartner,Walter; Kr철nke,Matthias; Schindler,G체nther, Microelectronic structure having a hydrogen barrier layer.

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29. Whitaker, Mark R.; Greefkes, Kirk, RFID interface and interrupt.

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30. Nagano Yoshihisa,JPX ; Kutsunai Toshie,JPX ; Judai Yuji,JPX ; Uemoto Yasuhiro,JPX ; Fujii Eiji,JPX, Semiconductor device and method for fabricating the same.

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31. Nagano, Yoshihisa; Kutsunai, Toshie; Judai, Yuji; Uemoto, Yasuhiro; Fujii, Eiji, Semiconductor device and method for fabricating the same.

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32. Takahashi, Makoto; Nagai, Kouichi, Semiconductor device and method for manufacturing the same.

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33. Takahashi, Makoto; Nagai, Kouichi, Semiconductor device and method for manufacturing the same.

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34. Nagai, Kouichi; Sato, Katsuhiro; Sugawara, Kaoru; Takahashi, Makoto; Kudou, Masahito; Asai, Kazuhiro; Miyazaki, Yukimasa; Saigoh, Kaoru, Semiconductor device and method of fabricating the same.

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35. Amanuma Kazushi,JPX, Semiconductor device and method of manufacturing the same.

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36. Kazushi Amanuma JP, Semiconductor device and method of manufacturing the same.

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37. Takano, Tamae; Ohsawa, Nobuharu; Kato, Kiyoshi, Semiconductor device having an antenna.

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38. Takano, Tamae; Ohsawa, Nobuharu; Kato, Kiyoshi, Semiconductor device having antenna and sensor elements.

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39. Nagano,Yoshihisa; Ito,Toyoji; Imanishi,Sadayuki; Fujii,Eiji, Semiconductor device including a capacitor having a capacitive insulating film of an insulating metal oxide.

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40. Takano, Tamae; Ohsawa, Nobuharu; Kato, Kiyoshi, Semiconductor device with antenna and light-emitting element.

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41. Saigoh, Kaoru; Nagai, Kouichi, Semiconductor device with pads of enhanced moisture blocking ability.

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42. Saigoh, Kaoru; Nagai, Kouichi, Semiconductor device with pads of enhanced moisture blocking ability.

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43. Saigoh, Kaoru; Nagai, Kouichi, Semiconductor device with pads of enhanced moisture blocking ability.

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