이 특허를 인용한 특허 (61)

1. Shih Cheng-Yeh,TWX ; Lee Yu-Hua,TWX ; Wu James (Cheng-Ming),TWX, Borderless dual damascene contact.

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2. Marsh, Eugene P.; Kraus, Brenda D., Capacitor having RuSixOy-containing adhesion layers.

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3. Harper James M. E. ; Geffken Robert M., Copper stud structure with refractory metal liner.

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4. Harper James M. E. ; Geffken Robert M., Copper stud structure with refractory metal liner.

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5. Omura Masayoshi,JPX, Damascene wiring with flat surface.

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6. Tsai Chao-Chieh,TWX ; Ho Chin-Hsiung ; Sun Yuan-Chen, Dual damascene interconnect process with borderless contact.

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7. Syun-Ming Jang TW; Anthony Yen TW; Hung-Chang Hsieh TW, Dual damascene method employing sacrificial via fill layer.

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8. Chen Chao-Cheng,TWX ; Lui Ming-Huei,TWX ; Liu Jen-Cheng,TWX ; Chao Li-chih,TWX ; Tsai Chia-Shiung,TWX, Dual damascene process for carbon-based low-K materials.

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9. Huang Yimin,TWX, Dual damascene process for manufacturing interconnects.

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10. Dai Chang-Ming,TWX ; Huang Jammy Chin-Ming,TWX, Dual damascene process using single photoresist process.

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11. Gutsche Martin ; Tobben Dirk, Dual damascene structure.

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12. Cote William J., Dual damascene structure formed in a single photoresist film.

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13. Jaso Mark A. ; Schnabel Rainer F., Dummy patterns for aluminum chemical polishing (CMP).

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14. Mark A. Jaso ; Rainer F. Schnabel, Dummy patterns for aluminum chemical polishing (CMP).

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15. Hu Yongjun Jeff ; Li Li, Electrochemical cobalt silicide liner for metal contact fills and damascene processes.

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16. Yongjun Jeff Hu ; Li Li, Electrochemical cobalt silicide liner for metal contact fills and damascene processes.

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17. Byun,Jeong Soo; Mak,Alfred, Formation of boride barrier layers using chemisorption techniques.

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18. Chen, Liang-Yuh; Guo, Ted; Mosley, Roderick Craig; Chen, Fusen, Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug.

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19. Chen,Liang Yuh; Guo,Ted; Mosley,Roderick Craig; Chen,Fusen, Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug.

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20. Jang Syun-Ming,TWX ; Huang Ming-Hsin,TWX, Hard masking method for forming oxygen containing plasma etchable layer.

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21. Ming-Hsin Huang TW, Hard masking method for forming residue free oxygen containing plasma etched layer.

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22. Pauliac, Sebastien, Lithography process.

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23. Nguyen Tue ; Hsu Sheng Teng, Low resistance contact between integrated circuit metal levels and method for same.

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24. Zhao Joe W. ; Catabay Wilbur G., Low stress, highly conformal CVD metal thin film.

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25. Goswami, Jaydeb; McTeer, Allen, Low-resistance interconnects and methods of making same.

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26. Kuo Ming-Hong,TWX, Method for fabricating a damascene landing pad.

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27. Sumi Hirofumi (Kanagawa JPX) Yamane Chigusa (Kanagawa JPX), Method for forming film of refractory metal.

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28. Choi Yang Kyu,KRX, Method for forming wiring of semiconductor device.

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29. Shinohara Kenji (Kanagawa JPX), Method for manufacturing a semiconductor device with a metallic interconnection layer.

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30. Clevenger, Lawrence A.; Nesbit, Larry A., Method for producing dual damascene interconnections and structure produced thereby.

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31. Marsh, Eugene P., Method for the formation of RuSixOy-containing barrier layers for high-k dielectrics.

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32. Marsh, Eugene P., Method for the formation of RuSixOy-containing barrier layers for high-k dielectrics.

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33. Tao Hun-Jan,TWX ; Chen Chao-Cheng,TWX ; Tsai Chia-Shiung,TWX, Method of dual damascene etching.

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34. Chien Ho-Ching,TWX, Method of fabricating a modified polysilicon plug structure.

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35. Oda Noriaki,JPX, Method of forming a semiconductor device having a critical path wiring.

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36. Givens John H., Method of forming contact vias and interconnect channels in a dielectric layer stack with a single mask.

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37. Tsai Chia Shiung,TWX ; Tao Hun-Jan,TWX, Method of forming dual damascene structure with improved contact/via edge integrity.

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38. Omura Masayoshi,JPX, Method of forming flat wiring layer.

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39. Gardner Mark I. ; Gilmer Mark C., Method of making a semiconductor device with a multi-level gate structure.

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40. Marsh, Eugene P.; Kraus, Brenda D., Method of manufacturing a capacitor having RuSixOy-containing adhesion layers.

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41. Nakatani, Kimihiko; Ashihara, Hiroshi, Method of manufacturing semiconductor device.

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42. Dai Chang-Ming,TWX, Method of self-aligned dual damascene patterning using developer soluble arc interstitial layer.

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43. Li Weimin ; Sandhu Gurtej S., Multiple step methods for forming conformal layers.

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44. Li Weimin ; Sandhu Gurtej S., Multiple step methods for forming conformal layers.

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45. Weimin Li ; Gurtej S. Sandhu, Multiple step methods for forming conformal layers.

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46. Dai Chang-Ming,TWX, Opposed two-layered photoresist process for dual damascene patterning.

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47. Eugene P. Marsh ; Brenda D. Kraus, Process for fabricating RuSixOy-containing adhesion layers.

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48. Marsh, Eugene P.; Kraus, Brenda D, Process for fabricating RuSixOy-containing adhesion layers.

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49. Marsh, Eugene P.; Kraus, Brenda D., Process for fabricating RuSixOy-containing adhesion layers.

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50. Marsh, Eugene P.; Kraus, Brenda D., Process for fabricating RuSixOy-containing adhesion layers.

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51. Marsh, Eugene P., Process for the formation of RuSixOy-containing barrier layers for high-k dielectrics.

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52. Cote William J., Process of forming a dual damascene structure in a single photoresist film.

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53. Eugene P. Marsh ; Brenda D. Kraus, RuSixOy-containing adhesion layers.

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54. Marsh, Eugene P.; Kraus, Brenda D., RuSixOy-containing adhesion layers and process for fabricating the same.

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55. Marsh, Eugene P.; Kraus, Brenda D., RuSixOy-containing adhesion layers and process for fabricating the same.

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56. Marsh, Eugene P., RuSixOy-containing barrier layers for high-k dielectrics.

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57. Clevenger,Lawrence A.; Nesbit,Larry A., Semiconductor device including dual damascene interconnections.

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58. Dai Chang-Ming,TWX, Single-mask dual damascene processes by using phase-shifting mask.

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59. Dai Chang-Ming,TWX, Single-mask dual damascene processes by using phase-shifting mask.

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60. Dai Chang-Ming,TWX ; Huang Jammy Chin-Ming,TWX, Two-layered TSI process for dual damascene patterning.

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61. Sasaki,Hitoshi; Yamazaki,Yasushi; Ota,Yasuji; Endo,Kaori; Katae,Nobuyuki; Watanabe,Kazuhiro, Word or collocation emphasizing voice synthesizer.

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