[특허]Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate

Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-021/226 H01L-021/335
출원번호	US-0423614 (1995-04-17)
발명자 / 주소	Racanelli Marco (Phoenix AZ) Hwang Bor-Yuan C. (Tempe AZ) Foerstner Juergen (Mesa AZ) Huang Wen-Ling M. (Phoenix AZ)
출원인 / 주소	Motorola, Inc. (Schaumburg IL 02)
인용정보	피인용 횟수 : 74 인용 특허 : 0

초록 ▼

A method of adjusting a threshold voltage for a semiconductor device on a semiconductor on insulator substrate includes performing a threshold voltage adjustment implant (25) after formation of a gate structure (16) to reduce the diffusion of implanted dopant (26). Reducing dopant diffusion eliminates the narrow channel effect which degrades device performance. Implanting the dopant (26) after formation of the gate structure (16) simplifies processing of semiconductor device (28) by eliminating a photolithography step which is accomplished by utilizing photoresist (21) used for a source and drain implant (22).

대표청구항 ▼

A method of adjusting a threshold voltage for a semiconductor device with a channel of a first conductivity type fabricated on a semiconductor on insulator (SOI) substrate, the method comprising: providing the semiconductor on insulator substrate; isolating an active region on the semiconductor on insulator substrate; forming a gate structure on the active region; forming a patterned photoresist layer on the semiconductor on insulator substrate while leaving the active region exposed; implanting a first dopant of the first conductivity type into the active region, wherein the first dopant is implanted with a first implant energy and with a first implant dose, wherein the gate structure prevents the first dopant from penetrating the active region under the gate structure during implanting of the first dopant, and wherein the first dopant does not pass through the patterned photoresist layer during implanting of the first dopant; implanting a second dopant of a second conductivity type into the active region, wherein the second dopant is implanted with a second implant energy and with a second implant dose, wherein the second dopant penetrates the active region under the gate structure by passing through the gate structure during implanting of the second dopant, wherein the second dopant does not pass through the patterned photoresist layer during implanting of the second dopant, and wherein the patterned photoresist layer used to block the first dopant is also used to block the second dopant; removing the patterned photoresist layer; and annealing the first dopant and the second dopant.

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
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연합인증

Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate 원문보기

초록 ▼

대표청구항 ▼

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연합인증

Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate 원문보기

초록 ▼

대표청구항 ▼

연구과제 타임라인

전체(0) 논문(0) 특허(0) 보고서(0)

전체(0) 논문(0) 특허(0) 보고서(0)

이 특허를 인용한 특허 (74)

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