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Electronic package with improved electrical performance 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
출원번호 US-0540835 (1995-10-11)
발명자 / 주소
  • Mahulikar Deepak (Madison CT)
출원인 / 주소
  • Olin Corporation (New Haven CT 02)
인용정보 피인용 횟수 : 61  인용 특허 : 29

초록

An electronic package having improved electrical properties in which a plastic Quad Flat Pack is provided with upper and lower metallic plates encased in the plastic body and overlapping at least a portion of the length of the encased portion of the leads whereby the self and mutual inductance of th

대표청구항

An electronic package comprising: a) a leadframe having a plurality of leads, each of said plurality of leads having an inner lead portion and an outer lead portion, and a die pad; b) an electronic device mounted on said die pad and electrically connected to said inner lead portions; c) a plastic bo

이 특허에 인용된 특허 (29)

  1. Mahulikar Deepak (Meriden CT) Popplewell James M. (Guilford CT), Aluminum alloy semiconductor packages.
  2. Spielberger Richard K. (Maple Grove MN), Chip package capacitor cover.
  3. VAN DE Leemput Lambertus J. M. A. (Geleen NLX), Chromium-based catalysts for the polymerization of 1-alkenes.
  4. SinghDeo Narendra N. (New Haven CT) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Electronic packaging of components incorporating a ceramic-glass-metal composite.
  5. SinghDeo Narendra N. (New Haven CT) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Electronic packaging of components incorporating a ceramic-glass-metal composite.
  6. Ross Milton I. (400 College Ave. Haverford PA 19041), Encapsulated electronic circuit device, and method and apparatus for making same.
  7. Foster Craig A. (Fremont CA) Galvez Randolfo (North Bergen NJ) Raab Kurt R. (Sunnyvale CA), G-tab manufacturing process and the product produced thereby.
  8. Butt Sheldon H. (Godfrey IL) Voss Scott V. (Portola Valley CA), Heat dissipating interconnect tape for use in tape automated bonding.
  9. Voss Scott V. (Portola Valley CA), Heat dissipating interconnect tape for use in tape automated bonding.
  10. Lin Lifun (Hamden CT), Hermetic cerglass and cermet electronic packages.
  11. Hascoe ; Norman, Hermetically sealed container for semiconductor and other electronic device s.
  12. Butt Sheldon H. (Godfrey IL), Hermetically sealed metal package.
  13. Butt Sheldon H. (Godfrey IL), Hermetically sealed semiconductor casing.
  14. Mahulikar Deepak (Madison CT) Fister Julius C. (Hamden CT) Violette Gerald N. (Hamden CT), Lead frame having polymer coated surface portions.
  15. Mahulikar Deepak (Meriden CT) Braden Jeffrey S. (Milpitas CA) Noe Stephen P. (Stratford CT), Metal electronic package having improved resistance to electromagnetic interference.
  16. Butt Sheldon H. (Godfrey IL) Mahulikar Deepak (Meriden CT), Metal packages having improved thermal dissipation.
  17. Butt Sheldon H. (Godfrey IL), Method of assembling a chip carrier.
  18. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Method of resin encapsulating a semiconductor device.
  19. Ibrahim Shawki (Lafayette IN) Elsner James E. (Lafayette IN), Multi-layer ceramic package.
  20. Harding Ade\yemi S. K. (12513 Hunters Chase Dr. Austin TX 78729), Packaging arrangement for energy dissipating devices.
  21. Katsumata Akio (Yokohama JPX) Hirata Seiichi (Yokosuka JPX) Fujieda Shinetsu (Kawasaki JPX) Shimozawa Hiroshi (Yokohama JPX), Plastic molded semiconductor device having waterproof cap.
  22. Butt Sheldon H. (Godfrey IL) Cherukuri Satyam C. (West Haven CT), Process for producing a hermetically sealed package for an electrical component containing a low amount of oxygen and wa.
  23. Ishida Yoshihiro (Tokorozawa JPX) Komatsu Katsuji (Kawagoe JPX) Mimura Seiichi (Kawagoe JPX) Takenouchi Kikuo (Higashimurayama JPX) Yabe Isao (Tokorozawa JPX) Ichikawa Shingo (Sayama JPX) Shimada Yos, Resin encapsulated semiconductor device.
  24. Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  25. Cherukuri Satyam C. (West Haven CT) Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  26. Sakai Kunito (Amagasaki JPX) Tamaki Akinobu (Amagasaki JPX) Takahama Takashi (Amagasaki JPX), Semiconductor device.
  27. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Semiconductor device and manufacturing method therefor.
  28. Nelson Keith W. (St. Louis Park MN) Lenz James E. (Brooklyn Park MN) Kawai Takeshi (Kanagawa JPX), Semiconductor device housing with magnetic field protection.
  29. Burns Carmen D. (Austin TX), Ultra high density integrated circuit packages method.

이 특허를 인용한 특허 (61)

  1. Corisis,David J., Chip scale package with heat spreader.
  2. Corisis,David J., Chip scale package with heat spreader.
  3. Corisis David J., Chip scale package with heat spreader and method of manufacture.
  4. Arnold,Rocky R.; Zarganis,John C.; Montauti,Fabrizio, EMI shielding for electronic component packaging.
  5. Horio, Tomoharu; Murakawa, Shigehiro, Electromagnetic shield cap and infrared data communication module.
  6. Martich Mark E., Electromechanical switching device package with controlled impedance environment.
  7. Corisis David J. ; Keeth Brent, High speed IC package configuration.
  8. Corisis, David J.; Keeth, Brent, High speed IC package configuration.
  9. Corisis, David J.; Keeth, Brent, High speed IC package configuration.
  10. David J. Corisis ; Brent Keeth, High speed IC package configuration.
  11. Corisis David J., IC package with dual heat spreaders.
  12. Corisis, David J., IC package with dual heat spreaders.
  13. Corisis, David J., IC package with dual heat spreaders.
  14. Zhao, Sam Ziqun; Khan, Rezaur Rahman, Integrated circuit (IC) package stacking and IC packages formed by same.
  15. Camacho, Zigmund Ramirez; Tay, Lionel Chien Hui; Pisigan, Jairus Legaspi; Bathan, Henry Descalzo, Integrated circuit package system with extended corner leads.
  16. Camacho, Zigmund Ramirez; Trasporto, Arnel Senosa; Tay, Lionel Chien Hui; Caparas, Jose Alvin, Integrated circuit packaging system with stacked paddle and method of manufacture thereof.
  17. Khan, Rezaur Rahman; Zhao, Sam Ziqun, Interconnect structure and formation for package stacking of molded plastic area array package.
  18. Khan, Rezaur Rahman; Zhao, Sam Ziqun, Interposer for die stacking in semiconductor packages and the method of making the same.
  19. Martich, Mark E., Inverted board mounted electromechanical device.
  20. Corisis David J. ; Brooks Jerry M. ; Lee Terry R., Lead frame assemblies with voltage reference plane and IC packages including same.
  21. Corisis David J. ; Brooks Jerry M. ; Lee Terry R., Lead frame assemblies with voltage reference plane and IC packages including same.
  22. Corisis, David J.; Brooks, Jerry M.; Lee, Terry R., Lead frame assemblies with voltage reference plane and IC packages including same.
  23. Corisis, David J.; Martin, Chris G., Lead frame decoupling capacitor semiconductor device packages including the same and methods.
  24. Corisis, David J.; Martin, Chris G., Lead frame decoupling capacitor, semiconductor device packages including the same and methods.
  25. Corisis,David J.; Martin,Chris G., Lead frame decoupling capacitor, semiconductor device packages including the same and methods.
  26. David J. Corisis ; Chris G. Martin, Lead frame decoupling capacitor, semiconductor device packages including the same and methods.
  27. Khan, Rezaur Rahman; Wang, Ken Jian Ming, Lead frame-BGA package with enhanced thermal performance and I/O counts.
  28. Zhao, Sam Ziqun; Khan, Rezaur Rahman, Leadframe IC packages having top and bottom integrated heat spreaders.
  29. Ono, Hiroshi; Yoshida, Shigeyoshi; Masumoto, Toshiaki, MRAM with an effective noise countermeasure.
  30. Tuttle, Mark E.; Deak, James G., Magnetic shield for integrated circuit packaging.
  31. Corisis, David J., Method for a semiconductor assembly having a semiconductor die with dual heat spreaders.
  32. Fan, Wen-Jeng, Method for forming an EMI shielding layer on all surfaces of a semiconductor package.
  33. Corisis David J., Method of making chip scale package with heat spreade.
  34. Corisis, David J., Method of making chip scale package with heat spreader.
  35. Leung, Timothy; Ramos, Mary Jean Bajacan; Yeow, Gan Kian; Lwin, Kyaw Ko; San Antonio, Romarico Santos; Subagio, Anang, Method of making thermally enhanced substrate-base package.
  36. Corsis, David J., Method of manufacturing chip scale package.
  37. Zhao, Sam Ziqun; Khan, Reza ur Rahman, Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages.
  38. Zhao, Sam Ziqun; Khan, Reza-ur Rahman, Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages.
  39. Spielberger, Richard K.; Katti, Romney R., Methods for providing a magnetic shield for an integrated circuit having magnetoresistive memory cells.
  40. Bissey Lucien J., Multi-capacitance lead frame decoupling device.
  41. Kinsman Larry D., Multilayered lead frame for semiconductor package.
  42. Kinsman Larry D., Multilayered lead frame for semiconductor packages.
  43. Zhao, Sam Ziqun; Khan, Rezaur Rahman, No-lead IC packages having integrated heat spreader for electromagnetic interference (EMI) shielding and thermal enhancement.
  44. Poinelli Renato,ITX ; Mazzola Mauro,ITX, Plastic body surface-mounting semiconductor power device having dimensional characteristics optimized for use of standar.
  45. Long, Jon M., Reduced inductance IC leaded package.
  46. Chen, Nan-Jang; Wong, Yau-Wai, SGS or GSGSG pattern for signal transmitting channel, and PCB assembly, chip package using such SGS or GSGSG pattern.
  47. Chen, Nan-Jang; Wong, Yau-Wai, SGS or GSGSG pattern for signal transmitting channel, and PCB assembly, chip package using such SGS or GSGSG pattern.
  48. Sekiguchi, Noboru; Murakami, Kazuo, Semiconductor device.
  49. Ohizumi Shinichi,JPX ; Hotta Yuji,JPX ; Kondo Seiji,JPX, Semiconductor device and method of fabricating the same.
  50. Ge, You; Lye, Meng Kong; Mei, Penglin, Semiconductor device with heat spreader.
  51. Bissey Lucien J., Semiconductor die assembly having leadframe decoupling characters.
  52. Bissey, Lucien J., Semiconductor die assembly having leadframe decoupling characters.
  53. Bissey, Lucien J., Semiconductor die assembly having leadframe decoupling characters and method.
  54. Kinsman Larry D., Semiconductor package having metal foil die mounting plate.
  55. Larry D. Kinsman, Semiconductor package having metal foil die mounting plate.
  56. Loo, Kum-weng; Kho, Chek-lim; Luan, Jing-en, Semiconductor package with position member.
  57. Corisis,David J., Semiconductor packages and methods for making and using same.
  58. Hurst Allan T. ; Spielberger Richard K., Shielded package for magnetic devices.
  59. Spielberger, Richard K.; Katti, Romney R., Shielding arrangement to protect a circuit from stray magnetic fields.
  60. Spielberger,Richard K.; Katti,Romney R., Shielding arrangement to protect a circuit from stray magnetic fields.
  61. Kinsman,Larry D.; Brooks,Jerry M., Varied-thickness heat sink for integrated circuit (IC) packages and method of fabricating IC packages.
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