[특허]Memory storage access control circuit for coupled mask-programmed microcontrollers

Memory storage access control circuit for coupled mask-programmed microcontrollers 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-013/16 H01J-013/00
출원번호	US-0086925 (1993-07-02)
우선권정보	DE-4222043 (1992-07-04)
발명자 / 주소	Hubert Rolf (Bonn DEX)
출원인 / 주소	Klockner-Moeller GmbH (Bonn DEX 03)
인용정보	피인용 횟수 : 43 인용 특허 : 0

초록 ▼

The invention discloses a memory access control for coupled mask-program over microcontrollers in particular in connection with applications for memory storage programmable control in the low-cost region. The coupling of the microcontroller (MC1) and of the memory access authorization to the external program memory storage and data memory storage (7) is thereby based on a hardware wiring circuit in cooperation with a handshake provided by software. Always only one microcontroller accesses the external program memory storage/data memory storage (7) while the other microcontrollers access their internal program memory storage. The memory storage access is coordinated by the microcontroller (MC1) operating as a master through its output port (Px.y). On the hardware side the memory storage access signal (PSEN) and the address access signal (ALE) are multiplexed for the access-authorized microcontroller. The coupling based on hardware uses thereby the bidirectionally operable input-output ports (P0-P3) and their alternative functions.

대표청구항 ▼

A memory storage access control circuit for coupled mask-programmed microcontrollers comprising an external program and data memory storage; a common data and address bus directly connected to the external program and data memory storage; a first microcontroller having a first plurality of bidirectionally operable ports and accessing the external program and data memory storage through the common data and address bus directly connected to the first plurality of bidirectionally operable ports; a second microcontroller having a second plurality of bidirectionally operable ports connected respectively in parallel to the first bidirectionally operable ports of the first microcontroller by way of a pin-to-pin connection and accessing the external program and memory storage through the common data and address bus, wherein the first microcontroller is operated as a master and wherein the second microcontroller is operated as a slave relative to the first microcontroller; a communication link furnished between the first microcontroller and the second microcontroller, wherein the communication link between the first microcontroller and the second microcontroller is controlled by software and hardware; a multiplexer furnishing logical means connected to the external program and data memory storage and to the first microcontroller and to the second microcontroller for multiplexing external memory storage release signals and for multiplexing external address release signals of the first microcontroller and of the second microcontroller by a multiplex signal, delivered by a port used as a slave select port of the first microcontroller, representing the master, and operated as an output wherein the first microcontroller, operating as the master, decides by way of its internal mask program which one of the first microcontroller and the second microcontroller should have access authorization to the external program and data memory storage, and wherein the external memory storage release signals and the external address release signals are fed as a memory storage access signal and an address access signal to the external program and data memory storage, and wherein simultaneously the multiplex signal is used to deliver the memory storage access signal to the second microcontroller, and wherein a mask program of that one of the first microcontroller and the second microcontroller, which has not received an external memory storage access authorization, operates bidirectionally operable ports of the microcontroller without the external memory storage access authorization as high resistency inputs; a plurality of microcontrollers up to an n-th coupled microcontroller, wherein n represents the total number of microcontrollers and is larger than 2, wherein m port outputs used as slave select port outputs of the first microcontroller operating as a master are used in order to form the multiplex signal and in order to multiplex external memory storage release signals and address release signals of those microprocessors operating as slaves, and in order to feed the external memory storage release signals and the address release signals to the external program and data memory storage as memory storage access signal and as address access signal, wherein n is smaller than 2m, wherein the multiplex signal accesses the logical means, which are provided as n to 1 multiplexer, and wherein the multiplex signal simultaneously commands the selected microcontroller to access the external program and data memory storage through slave select port inputs of the selected microcontroller; wherein the mask code of each one of the plurality of microcontrollers beginning with the second microcontroller, coupled to the master microcontroller, operates an acknowledgment port connector of each one of the plurality of microcontrollers beginning with the second microcontroller as an input with a pull-up resistor, and wherein the mask code switches the acknowledgment port connector as an output during the external memory storage access in order to deliver a message to a master of an external memory storage access; wherein the first microcontroller representing the master receives at its acknowledgment port connector a handshaking signal from a microcontroller of the plurality of microcontrollers beginning with the second microcontroller, wherein said handshaking signal is furnished to the master for the external memory storage access, and wherein this handshaking signal confirms the memory storage access and the end of the memory storage access of the slave to the master.

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
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연합인증

Memory storage access control circuit for coupled mask-programmed microcontrollers 원문보기

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Memory storage access control circuit for coupled mask-programmed microcontrollers 원문보기

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연구과제 타임라인

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이 특허를 인용한 특허 (43)

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