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Thin film semiconductor device with gate metal oxide and sidewall spacer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-027/092
  • H01L-029/04
  • H01L-029/786
출원번호 US-0291028 (1994-08-16)
우선권정보 JP-0227891 (1993-08-20)
발명자 / 주소
  • Takemura Yasuhiko (Kanagawa JPX) Zhang Hongyong (Kanagawa JPX) Konuma Toshimitsu (Kanagawa JPX)
출원인 / 주소
  • Semiconductor Energy Laboratory Co., Ltd. (Kanagawa-ken JPX 03)
인용정보 피인용 횟수 : 162  인용 특허 : 8

초록

A monolithic circuit comprises a plurality of thin film transistors. Source and drain regions of the TFT are provided with a metal silicide layer having a relatively low resistivity. Thereby, the effective distance between a gate and a source/drain electrode can be reduced.

대표청구항

A semiconductor device comprising: a substrate having an insulting surface; and a plurality of thin film transistors formed on said insulating surface, at least one of said thin film transistors comprising a silicon semiconductor layer including source, drain and channel regions, metal silicide regi

이 특허에 인용된 특허 (8)

  1. Medwin Lawrence B. (Edmonds WA), CMOS Device with silicided sources and drains and method.
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  8. Hwang Jeong-Mo (Plano TX), Silicon on insulator device comprising improved substrate doping.

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