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Components for housing an integrated circuit device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/52
  • H01L-023/34
  • H01L-023/48
  • H01L-023/04
출원번호 US-0413149 (1994-03-29)
발명자 / 주소
  • Hoffman Paul R. (Modesto CA) Mahulikar Deepak (Madison CT) Brathwaite George A. (Hayward CA) Solomon Dawit (Manteca CA) Parthasarathi Arvind (North Branford CT)
출원인 / 주소
  • Olin Corporation (Manteca CA 02)
인용정보 피인용 횟수 : 167  인용 특허 : 39

초록

There is provided a metallic component for an electronic package. The component is coated with an electrically non-conductive layer and has a plurality of conductive circuit traces are formed on a surface. The circuit traces are soldered directly to the input/output pads of an integrated circuit dev

대표청구항

A component for an electronic package comprising: a metallic substrate coated with an electrically non-conductive layer; at least two integrated circuit devices bonded to opposing surfaces of said metallic substrate; and a first plurality of conductive circuit traces formed on opposing surfaces of s

이 특허에 인용된 특허 (39)

  1. Mahulikar Deepak (Meriden CT) Popplewell James M. (Guilford CT), Aluminum alloy semiconductor packages.
  2. Mahulikar Deepak (Meriden CT) Popplewell James M. (Guilford CT), Aluminum alloy semiconductor packages.
  3. Fox Leslie R. (Boxborough MA), Apparatus for packaging and cooling integrated circuit chips.
  4. Nagesh Voddarahalli K. (Cupertino CA) Miller Daniel J. (San Francisco CA) Schuchard Robert A. (Fort Collins CO) Hargis Jeffrey G. (Fort Collins CO), Composite transversely plastic interconnect for microchip carrier.
  5. Smeenge ; Jr. James G. (Campbell CA) Rogers Paul L. (San Jose CA), Conductive elastomeric interface for a pin grid array.
  6. Eastman, Dean E.; Eldridge, Jerome M.; Petersen, Kurt E.; Olive, Graham, Cooling system for VLSI circuit chips.
  7. Bartelink Dirk J. (Los Altos Hills CA), Flexible attachment flip-chip assembly.
  8. Andrews James A. (Phoenix AZ), Flip chip package and method of making.
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  10. Duffy Victor P. (Scottsdale AZ), High power cooler and method thereof.
  11. Chia Chok J. (Campbell CA) Alagaratnam Manian (Cupertino CA) Low Qwai H. (Cupertino CA) Lim Seng-Sooi (San Jose CA), High power dissipating packages with matched heatspreader heatsink assemblies.
  12. Brzezinski Dennis (Sunnyvale CA), Integrated multi-chip module having a conformal chip/heat exchanger interface.
  13. Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL) Crane Jacob (Woodbridge CT) Pasqualoni Anthony M. (New Haven CT) Smith Edward F. (Madison CT), Metal electronic package.
  14. Butt Sheldon H. (Godfrey IL) Mahulikar Deepak (Meriden CT), Metal packages having improved thermal dissipation.
  15. Mahulikar Deepak (Meriden CT), Metal pin grid array package.
  16. Braden Jeffrey S. (Milpitas CA), Method for housing a tape-bonded electronic device and the package employed.
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  18. Andros Frank E. (Binghamton NY) Shay Robert J. E. (Salisbury NC), Micro helix thermo capsule.
  19. Schmitt ; III Jerome J. (New Haven CT) Halpern Bret L. (Bethany CT), Microwave plasma assisted supersonic gas jet deposition of thin film materials.
  20. Moriizumi Kiyokazu (Kawasaki JPX) Kawano Kyoichiro (Yokohama JPX) Seyama Kiyotaka (Kawasaki JPX), Module sealing structure.
  21. Shimizu Mitsuharu (Nagano JPX) Takeda Yoshiki (Nagano JPX) Fujii Hirofumi (Nagano JPX), Multi-layer lead frame for a semiconductor device with contact geometry.
  22. Braden Jeffrey S. (Milpitas CA), Multi-layer lead frames for integrated circuit packages.
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  24. Kurokawa Yasuhiro (Tokyo JPX), Package structure for semiconductor device having a flexible wiring circuit member spaced from the package casing.
  25. Wasielewski J. Paul (Scottsdale AZ), Packaging module for a semiconductor wafer.
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  27. Kajiwara Ryoichi (Hitachi JPX) Funamoto Takao (Hitachi JPX) Katoo Mitsuo (Hitachi JPX) Shida Tomohiko (Hitachi JPX) Matsuzaka Takeshi (Hitachi JPX) Wachi Hiroshi (Hitachi JPX) Takahashi Kazuya (Katsu, Sealed-type liquid cooling device with expandable bellow for semiconductor chips.
  28. O\Donnelly Brien E. (Branford CT), Sealing glass composite.
  29. Butt Sheldon H. (Godfrey IL), Semiconductor casing.
  30. Lin Paul T. (Austin TX), Semiconductor device having an insertable heat sink and method for mounting the same.
  31. Mennitt Timothy J. (Cedar Park TX) Warren John P. (Austin TX) Sloan James W. (Austin TX), Semiconductor device with test-only contacts and method for making the same.
  32. Crane Jacob (Woodbridge CT) Johnson Barry C. (Tucson AZ) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Semiconductor package.
  33. Neidig Arno (Plankstadt DEX) Wessjohann Hans G. (Mannheim DEX), Semiconductor power module with an integrated heat pipe.
  34. Soga Tasao (Hitachi JPX) Goda Marahiro (Hitachi JPX) Nakano Fumio (Hitachi JPX) Kushima Tadao (Ibaraki JPX) Ushifusa Nobuyuki (Hitachi JPX) Kobayashi Fumiyuki (Sagamihara JPX) Sawahata Mamoru (Hitach, Semiconductor resin package structure.
  35. Sukonnik Israil M. (Plainville MA) Forster James A. (Barrington RI) Breit Henry F. (Attleboro MA) Raphanella Gary A. (South Easton MA), Substrate for an electrical circuit system and a circuit system using that substrate.
  36. Nishiguchi Masanori (Yokohama JPX) Miki Atsushi (Yokohama JPX), Substrate for packaging a semiconductor device.
  37. Mahulikar Deepak (Meriden CT) Crane Jacob (Woodbridge CT) Khan Abid A. (Godfrey IL), Thermal performance package for integrated circuit chip.
  38. Lin Paul T. (Austin TX) McShane Michael B. (Austin TX), Thin, molded, surface mount electronic device.
  39. Shanker Bangalore J. (Santa Clara CA) Belani Jagdish G. (Cupertino CA), Use of a heat pipe integrated with the IC package for improving thermal performance.

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