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Bus arbiter and bus arbitrating method 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
출원번호 US-0354169 (1994-12-08)
우선권정보 JP-0002811 (1994-01-14); JP-0296827 (1994-11-30)
발명자 / 주소
  • Sato Masami (Ishikawa JPX) Goto Yuichi (Kawasaki JPX)
출원인 / 주소
  • Fujitsu Limited (Kawasaki JPX 03)
인용정보 피인용 횟수 : 61  인용 특허 : 0

초록

A plurality of priority determining units determine a bus use among a plurality of bus masters on the basis of bus request signals respectively from the bus masters and thereby generate bus grant signal. A bus request allocation unit allocates each bus request signals to one or more priority determi

대표청구항

A bus arbiter for arbitrating a bus among a plurality of bus masters based on bus request signals supplied from the bus masters and outputting a bus grant signal to a selected bus master acquiring the bus, comprising: a plurality of priority determining means for determining a priority of bus use am

이 특허를 인용한 특허 (61)

  1. Goudie, Alistair I., Arbiter for queue management system for allocating bus mastership as a percentage of total bus time.
  2. Lee Suk Joong,KRX ; Choi Jin Kook,KRX, Arbitration apparatus using least recently used algorithm.
  3. Michizono Masatoshi,JPX ; Muta Toshiyuki,JPX ; Odahara Koichi,JPX ; Sakurai Yasutomo,JPX ; Katoh Shinya,JPX, Arbitration circuit for arbitrating requests from multiple processors.
  4. Dutton Drew J., Bus arbiter employing a transaction grading mechanism to dynamically vary arbitration priority.
  5. Paluzzi, Nicholas, Bus arbiter for a data storage system.
  6. Gulick Dale E., Bus arbiter including aging factor counters to dynamically vary arbitration priority.
  7. Hooks Douglas A. ; Dutton Drew J., Bus arbiter method and system.
  8. Min Kyung Pa,KRX ; Lee Gye Hun,KRX, Bus arbitration system having both round robin and daisy chain arbiters.
  9. Yakashiro Masataka,JPX, Bus control apparatus using plural allocation protocols and responsive to device bus request activity.
  10. Date,Atsushi; Kato,Katsunori; Yokoyama,Noboru; Maeda,Tadaaki; Fujiwara,Takafumi, Bus management based on bus status.
  11. Dutton Drew J., Computer system including a plurality of real time peripheral devices having arbitration control feedback mechanisms.
  12. Lin, Hsing-Nan, Data transmission selection circuit and method.
  13. Sutherland Ivan E. ; Tavrow Lee S., Fast arbiter with decision storage.
  14. Prasadh, Ramamoorthy Guru, Integrated circuit having a bus network, and method for the integrated circuit.
  15. Prasadh, Ramamoorthy Guru, Integrated circuit having a bus network, and method for the integrated circuit.
  16. White, Theodore C.; Jayabharathi, Dinesh, Integrated memory controller.
  17. White, Theodore C.; Jayabharathi, Dinesh, Integrated memory controller.
  18. White,Theodore C.; Jayabharathi,Dinesh, Integrated memory controller.
  19. White,Theodore C.; Jayabharathi,Dinesh, Integrated memory controller.
  20. Purdham, David M.; Byers, Larry L.; Artz, Andrew, Interrupt controller for prioritizing interrupt requests in an embedded disk controller.
  21. Purdham,David M.; Byers,Larry L.; Artz,Andrew, Interrupt controller for processing fast and regular interrupts.
  22. Kruse, Robert Earl, Method and apparatus for avoiding data bus grant starvation in a non-fair, prioritized arbiter for a split bus system with independent address and data bus grants.
  23. Yamamoto,Hitoshi, Method and apparatus for bus arbitration capable of effectively altering a priority order.
  24. Spaur, Michael R.; Sandoval, Raymond A., Method and system for automatic time base adjustment for disk drive servo controllers.
  25. Spaur,Michael R.; Sandoval,Raymond A., Method and system for automatic time base adjustment for disk drive servo controllers.
  26. Spaur,Michael R.; Sandoval,Raymond A., Method and system for collecting servo field data from programmable devices in embedded disk controllers.
  27. Spaur,Michael R.; Sandoval,Raymond A., Method and system for collecting servo field data from programmable devices in embedded disk controllers.
  28. Byers,Larry L.; Ricci,Paul B.; Kriscunas,Joseph G.; Desubijana,Joseba M.; Robeck,Gary R.; Spaur,Michael R.; Purdham,David M., Method and system for embedded disk controllers.
  29. Spaur, Michael R.; Sandoval, Raymond A., Method and system for head position control in embedded disk drive controllers.
  30. Spaur,Michael R.; Sandoval,Raymond A., Method and system for head position control in embedded disk drive controllers.
  31. Spaur,Michael R.; Sandoval,Raymond A., Method and system for head position control in embedded disk drive controllers.
  32. Perozo, Angel G.; Dennin, William W., Method and system for processing frames in storage controllers.
  33. Perozo, Angel G.; Dennin, William W., Method and system for processing frames in storage controllers.
  34. Pinvidic, Daniel R.; Datwyler, Wayne C.; Hudiono, Hunardi, Method and system for read gate timing control for storage controllers.
  35. Pinvidic, Daniel R; Datwyler, Wayne C.; Hudiono, Hunardi, Method and system for read gate timing control for storage controllers.
  36. Spaur, Michael R.; Kim, Ihn, Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers.
  37. Spaur,Michael R.; Kim,Ihn, Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers.
  38. Byers, Larry L.; Desubijana, Joseba M.; Robeck, Gary R.; Dutton, Fredarico E., Method and system for using an external bus controller in embedded disk controllers.
  39. Byers,Larry L.; Desubijana,Joseba M.; Robeck,Gary R.; Dutton,Fredarico E., Method and system for using an external bus controller in embedded disk controllers.
  40. Krantz, Leon A.; Campbell, Frank W., Methods and systems for arbitrating access to a disk controller buffer memory by allocating various amounts of times to different accessing units.
  41. Chaudhari,Sunil C.; Liu,Jonathan W.; Patel,Manan; Duresky,Nicholas E., Multilevel fair priority round robin arbiter.
  42. Perozo, Angel G.; White, Theodore C.; Dennin, William W.; Cruz, Aurelio J., Power save module for storage controllers.
  43. Perozo,Angel G.; White,Theodore C.; Dennin,William W.; Cruz,Aurelio J., Power save module for storage controllers.
  44. Gehman Judy M., Priority arbiter with shifting sequential priority scheme.
  45. Chae,Kwan yeob, Programmable fixed priority and round robin arbiter for providing high-speed arbitration and bus control method therein.
  46. Byers, Larry L.; Purdham, David M.; Spaur, Michael R., Servo controller interface module for embedded disk controllers.
  47. Krantz, Leon A.; Nguyen, Kha; North, Michael J., Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device.
  48. Krantz, Leon A.; Nguyen, Kha; North, Michael J., Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device.
  49. White,Theodore C.; Dennin,William W.; Perozo,Angel G., System and method for concatenating data.
  50. Jayabharathi, Dinesh, System and method for conducting BIST operations.
  51. Jayabharathi,Dinesh, System and method for conducting BIST operations.
  52. Nguyen, Kha; Wong, William C.; Jang, Mouluan; Wang, Jane X., System and method for controlling buffer memory overflow and underflow conditions in storage controllers.
  53. White,Theodore C.; Dennin,William W.; Perozo,Angel G., System and method for padding data blocks and/or removing padding from data blocks in storage controllers.
  54. Ricci,Paul B., System and method for performing parity checks in disk storage system.
  55. Ricci, Paul B., System and method for performing parity checks in disk storage systems.
  56. White, Theodore C.; Dennin, William W.; Perozo, Angel G., System and method for reading and writing data using storage controllers.
  57. White, Theodore C.; Dennin, William W.; Perozo, Angel G., System and method for transferring data in storage controllers.
  58. Nguyen, Huy T.; Krantz, Leon A.; Dennin, William W., System and method for transmitting data in storage controllers.
  59. Jayabharathi, Dinesh; Dennin, William W., System and method for using TAP controllers.
  60. Kim, Youngsik; Lee, Yun-Tae, System on a chip having a system bus, an external bus, and a bus arbiter with programmable priorities for both buses, software, and method for assigning programmable priorities.
  61. Lambrecht J. Andrew ; Hartmann Alfred C., Variable latency and bandwidth communication pathways.
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