초록 ▼

On a semi-insulating substrate is formed a conductive layer and an undoped layer. On specified regions of the conductive layer are formed ohmic electrodes, each serving as a source electrode or a drain electrode, via a pair of square contact regions. The circumferential edges of the contact regions

On a semi-insulating substrate is formed a conductive layer and an undoped layer. On specified regions of the conductive layer are formed ohmic electrodes, each serving as a source electrode or a drain electrode, via a pair of square contact regions. The circumferential edges of the contact regions are undercut beneath the ohmic electrodes. Between the pair of contact regions on the conductive layer is formed a gate electrode by self alignment using the ohmic electrodes as a mask. The gate electrode has extended in the direction of gate width and the extended portion serves as a withdrawn portion of the gate electrode. Upper electrodes are formed by self alignment in the same process in which the gate electrode is formed.

대표청구항 ▼

A field-effect transistor comprising: a semi-insulating substrate; a conductive layer formed on a specified region of said semi-insulating substrate; a pair of square contact regions formed on said conductive layer so as to be opposed to each other and having their circumferential edges undercut; a

A field-effect transistor comprising: a semi-insulating substrate; a conductive layer formed on a specified region of said semi-insulating substrate; a pair of square contact regions formed on said conductive layer so as to be opposed to each other and having their circumferential edges undercut; a source electrode formed on one of said pair of contact regions so as to be in ohmic contact with said one contact region; a drain electrode formed on the other of said pair of contact regions so as to be in ohmic contact with said other contact region; a gate electrode formed, over said conductive layer in a first region between said source electrode and said drain electrode and in a second region extending continuously from said first region in a direction of gate width to the outside of said conductive layer, by self alignment using said source electrode as a mask, said gate electrode being smaller in layer thickness than said contact regions and in Schottky contact with said conductive layer; and an upper electrode for the source electrode formed on said source region in the same process in which said gate electrode is formed so as to be in ohmic contact with said source electrode.