[특허]Asynchronous bidirectional application program processes interface for a distributed heterogeneous multiprocessor system

Asynchronous bidirectional application program processes interface for a distributed heterogeneous multiprocessor system 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-015/16
출원번호	US-0783661 (1991-10-28)
발명자 / 주소	Stevens Bruce W. (North Kingstown RI)
출원인 / 주소	The United States of Americas as represented by the Secretary of the Navy (Washington DC 06)
인용정보	피인용 횟수 : 45 인용 특허 : 0

초록 ▼

A network interface resident on one processor enables heterogenous processors interconnected by a common network to exchange control and data information via virtual circuits created and maintained by the network interface between sockets defined at the communicating processors. Different kinds of messages are discriminated and their length is determined to enable the same network virtual circuit to mulitplex data and control information in a manner that is message specific and conserves network resources. Data conversion is implemented to enable heterogeneous processors to communicate over the network virtual circuit. Asynchronous, bidirectional communication is provided by the network interface for tightly-coupled, moderately-coupled, and loosely-coupled hardware architecture conformance types.

대표청구항 ▼

For use in a multiprocessing system in which plural and heterogeneous processors perform distributed processing, a subsystem for interfacing component processes of application programs resident in different ones of the plural heterogeneous processors, which subsystem for interfacing asynchronously and bidirectionally enables processing in one and another of at least two heterogeneous processors of the plurality as though the distributed processing was performed under run control of a unitary, undistributed application program, said heterogeneous one and another processors differing by having at least one difference characteristic from among (A) plural, predetermined data representation format characteristics of the plural processors and (B) plural, predetermined different processor architecture characteristics dependent ways of using component processes of an application program, said plural processors being interconnected for multiprocessing by an interprocessor communication subsystem in which signals are borne by a hardware interconnection means, said subsystem for interfacing application program processes comprising: cross-processor-tasking-of-application-program-components-layer-means residing in the application program level of software hierarchy coupled to a selected processor, which cross-processor-tasking-layer-means is operative to enable one task asynchronous to one component process run by one processor of one heterogeneous kind to use another component task asynchronous to another process run by another processor of another heterogeneous kind in such a way that the fact that the another task is being run by the another processor is transparent to the using processor as if the distributed processing is being performed under run control of a unitary, undistributed application program; presentation-layer-means residing in the application program level of software hierarchy which is cooperative with the cross-process-tasking-of-application-program-components-layer-means for converting data from the data representation format characteristic of the one processor whose component process is to use the another component process to another data representation format characteristic corresponding to the another processor whose component process is being run thereby and for determining which of plural, predetermined ways the used component process is to be used; connections-and-task-transport-layer-means in part residing in the application program level of software hierarchy and in part facilitated by the hardware interconnection means of the interprocessor communications subsystem, which connections-and-task-transport-layer-means is cooperative with both the cross-processor-tasking-of-application-program-components-layer-means and the presentation-layer-means for providing a network virtual circuit between sockets defined between the processes borne by the distributed processors and for providing sending and receiving tasks along the network virtual circuit between the sockets of the several processes thereof thereby facilitating execution of the component processor application programs resident in different and heterogeneous processors as though a unitary, undistributed application program were being executed, the hardware interconnection means providing the communication path facilitating unification of execution of the component processes in the separately resident application programs; and data-and-usage-determined-information-transport-layer-means resident in the application program level of software hierarchy cooperative with the connections-and-task-transport-layer-means for providing data reads and data writes of data representation-format-converted and usage-determined information along the network virtual circuit by the sending and receiving tasks between the sockets of the network virtual circuit.

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연합인증

Asynchronous bidirectional application program processes interface for a distributed heterogeneous multiprocessor system 원문보기

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Asynchronous bidirectional application program processes interface for a distributed heterogeneous multiprocessor system 원문보기

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