초록 ▼

The embodiments of the present invention allow the formation of interconnect and vias without forming via veils or excessive thinning of vias. Conductive members (52, 54, 56, 58) are formed with a pattern generally corresponding to the shape of interconnects. A lower intermetallic insulating layer (

The embodiments of the present invention allow the formation of interconnect and vias without forming via veils or excessive thinning of vias. Conductive members (52, 54, 56, 58) are formed with a pattern generally corresponding to the shape of interconnects. A lower intermetallic insulating layer (70)is deposited over the substrate (30) and removed over conductive members (52, 54, 56, 58) before forming via portions. Via portions are formed from the conductive members (52, 54, 56, 58). An upper intermetallic insulating layer (134) is formed and planarized to fill locations overlying the interconnect portions of the conductive members (52, 54, 56, 58) near the vias.

대표청구항 ▼

A process for forming a semiconductor device comprising the steps of: forming a conductive layer over a semiconductor substrate; patterning the conductive layer for a first time to remove an entire thickness of the conductive layer; forming a first insulating layer over the conductive layer after th

A process for forming a semiconductor device comprising the steps of: forming a conductive layer over a semiconductor substrate; patterning the conductive layer for a first time to remove an entire thickness of the conductive layer; forming a first insulating layer over the conductive layer after the step of patterning the layer for the first time, wherein the first insulating layer includes a material selected from a group consisting of oxide, nitride, and oxynitride; removing a portion of the first insulating layer such that a top surface of the conductive layer is exposed; patterning the conductive layer for a second time to remove only a part of and not the entire thickness of the conductive layer to form an exposed edge of the conductive layer, wherein this step is performed after the step of removing the first insulating layer; forming a second insulating layer over the first insulating layer and along the exposed edge of the conductive layer, wherein the second insulating layer includes a material selected from a group consisting of oxide, nitride, and oxynitride and wherein, this step is performed after the step of patterning the conductive layer for a second time; and polishing the second insulating layer to remove all of a portion of the second insulating layer that overlies the top surface of the conductive layer.