초록 ▼

A trellis coded modulation system comprises a first coder for convolutionally coding a first input data bit X1 for deriving first and second output bits Z0 and Z1. A second coder precodes a second input data bit X2 for deriving an output bit Z2. The output bits Z0, Z1 and Z2 are mapped into correspo

A trellis coded modulation system comprises a first coder for convolutionally coding a first input data bit X1 for deriving first and second output bits Z0 and Z1. A second coder precodes a second input data bit X2 for deriving an output bit Z2. The output bits Z0, Z1 and Z2 are mapped into corresponding one-dimensional multi-value symbols, wherein the output bits Z0, Z1 identify respective subsets of the symbols, each of the subsets comprising two equally spaced symbol values, and the output bits Z1, Z2 identify respective pairs of the symbols, each of the pairs comprising two adjacent symbol values.

대표청구항 ▼

A trellis coded modulator comprising: means for convolutionally coding a first input data bit X1, for deriving first and second output bits Z0 and Z1; means for precoding one or more second input data bits X2-XN for deriving respective output bits Z2-ZN; and means for mapping the output bits Z0, Z1,

A trellis coded modulator comprising: means for convolutionally coding a first input data bit X1, for deriving first and second output bits Z0 and Z1; means for precoding one or more second input data bits X2-XN for deriving respective output bits Z2-ZN; and means for mapping the output bits Z0, Z1, Z2-ZN into corresponding one-dimensional multi-value symbols, wherein said symbols form a phase variant symbol constellation and wherein the output bits Z0, Z1 identify respective subsets of said symbols, each of said subsets comprising two or more equally spaced symbol values, and the output bits Z1, Z2-ZN identify respective pairs of said symbols, each of said pairs comprising two adjacent symbol values.