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A method and apparatus for identifying obsolete data within cache memory in a multiprocessor architecture. This is accomplished while still providing the advantages of having cache resources dedicated to individual instruction processors as well as shared intermediate level cache modules. The techni

A method and apparatus for identifying obsolete data within cache memory in a multiprocessor architecture. This is accomplished while still providing the advantages of having cache resources dedicated to individual instruction processors as well as shared intermediate level cache modules. The technique provides the band pass and attendant performance advantages of an essentially point-to-point architecture without all of the added hardware of a centralized master system storage controller. Further, unlike a strictly point-to-point architecture, the present invention is readily expandable to service a large number of multiprocessors without burdening each of the multiprocessors with the corresponding increase in interface and connection costs of a strictly point-to-point architecture. This simplifies the design of the multiprocessor elements and also allows a system to be expanded to include more or less multiprocessors by simply including a modified XBAR interface. In a strictly point-to-point architecture, the multiprocessors may have to be modified to expanding a system because the interfacing circuitry associated therewith is contained therein. The present invention further has a means for increasing the performance of the XBAR interface by providing an anticipatory acknowledge signal back to a requesting multiprocessor.

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A method of ensuring data coherency in a data processing system having a first storage controller and at least one other storage controller(s) wherein the first storage controller has a first local memory element that may contain a first copy of a data block and wherein each of the at least one othe

A method of ensuring data coherency in a data processing system having a first storage controller and at least one other storage controller(s) wherein the first storage controller has a first local memory element that may contain a first copy of a data block and wherein each of the at least one other storage controller(s) have a local memory element contained therein that may contain a second copy of the data block, the first storage controller being able to execute a local write instruction to the first local memory element and further having the capability to execute a remote write instruction to the local memory element(s) contained within the at least one other storage controller(s), comprising the steps of: a. providing an XBAR interface block coupling the first storage controller to the at least one other storage controller(s), the XBAR interface block providing an interface between the first storage controller and the at least one other storage controller(s); b. providing an invalidate request block coupled to the first storage controller for generating an invalidate request when the first storage controller executes a write instruction; c. providing a write request block coupled to the first storage controller for generating a write request when the first storage controller executes a write instruction; d. providing a write out queue, a write in queue, an invalidate out queue, and an invalidate in queue within the first storage controller and within each of the at least one other storage controller(s); e. providing a remote write queue and a remote invalidate queue within the XBAR interface block; f. providing an invalidate duplicate tag block within the first storage controller and the at least one other storage controller(s); g. waiting for the write request block within the first storage controller to generate a write request; h. capturing the write request in the write out queue within the first storage controller when step (g) detects the write request; i. waiting for the write out queue to service the write request captured in step (h); j. determining if the write request is to a memory within the first storage controller or to a memory within one of the at least one other storage controller(s) thereby determining if the write request is local or remote; k. routing a corresponding write address and write data to the local memory element within the first storage controller and perform a write therein if step (j) determines that the write request is local; l. placing an invalidate request into the invalidate out queue; m. waiting for the invalidate out queue to service the invalidate request; n. routing an invalidate address to the invalidate duplicate tag block within the first storage controller; o. determining if there is a match between the invalidate address and the contents of the invalidate duplicate tag block; p. invalidating the first copy of the data block if a match is found in step (o); q. performing steps (r)→(zz) if the write request is to a remote storage controller; r. sending the write request and the corresponding write address to the remote write queue within the XBAR interface block; s. sending the invalidate request and the corresponding invalidate address to the remote invalidate queue within the XBAR interface block; t. waiting for the remote write queue to service the write request; u. allowing the invalidate request to enter the remote invalidate queue when the remote write queue services the write request; v. routing the write request and the corresponding write address to the write in queue within a selected one of the at least one other storage controller(s); w. waiting for the remote invalidate queue to service the invalidate request; x. routing the invalidate request and the corresponding invalidate address to the invalidate in queue within the selected one of the at least one other storage controller(s); y. waiting for the write in queue to service the write request, and once serviced, route the corresponding write address to the local memory within the selected one of the at least one other storage controller(s) and performing a write thereon; z. routing the invalidate address to the invalidate duplicate tag block within the selected one of the at least one other storage controllers and determining of there is a match between the invalidate address and the contents of the invalidate duplicate tag block; and zz. invalidating the second copy of the data block if a match is found in step (z).