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Method for transferring data between processors on a network by establishing an address space for each processor in each 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/24
  • G06F-012/08
  • G06F-013/38
  • G06F-015/16
출원번호 US-0262081 (1994-06-17)
발명자 / 주소
  • Gregg Thomas A. (Highland NY) Capowski Robert S. (Verbank NY) Ferraiolo Frank D. (New Windsor NY) Halma Marten J. (Poughquag NY) Hillock Thomas H. (Woodstock NY) Murray Robert E. (Kingston NY)
출원인 / 주소
  • International Business Machines Corporation (Armonk NY 02)
인용정보 피인용 횟수 : 52  인용 특허 : 8

초록 ▼

A multi-system interconnect facility in which each central processor complex in the system has an assigned storage space for each other central processor complex in the system for use in communicating with each other central processor complex. The allegiance or association of systems to particular s

대표청구항 ▼

A method for transferring data between central processor complexes that are interconnected in a network where each central processor complex comprises a processor, a main memory, and a port for sending and receiving data, said method including the steps of: partitioning said main memory of each cent

이 특허에 인용된 특허 (8)

  1. Curley John L. (North Andover MA) Hirsch Thomas S. (Bedford MA) Penney John C. (Chelmsford MA) Reisch Ileana S. (Carlisle MA) Staplin ; Jr. Theodore R. (Chelmsford MA) Wurz David A. (Winchester MA), Apparatus and method for a data processing system having a peer relationship among a plurality of central processing uni.
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  2. Rosenbaum Walter S. (Bethesda MD), Data processing system for optimized mail piece sorting and mapping to carrier walk sequence using real time statistical.
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  3. Strecker William D. (Harvard MA) Thompson David (Malden MA) Casabona Richard (Stow MA), Dual path bus structure for computer interconnection.
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  4. Basso Claude (Nice FRX) Lebizay Gerald (Vence FRX) Munier Jean-Marie (Cagnes Sur Mer FRX) Pauporte Andre (La Colle sur Loup FRX), Interface for independently establishing a link and transmitting high level commands including logical addresses from de.
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  5. Kita Kouichi (Nishi-Nasuno JPX), Method and system for expediting multi-packet messages in a computer network.
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  6. O\Quin ; II John T. (Austin TX) O\Quin ; III John C. (Chappaqua NY), Method to operate on large segments of data in a virtual memory data processing system.
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  7. Nakazawa Takuichiro (Kodaira JPX) Hanawa Makoto (Kokubunji JPX) Hasegawa Atsushi (Koganei JPX) Kawasaki Ikuya (Tokyo JPX) Iwasaki Kazuhiko (Hachiohji JPX) Morinaga Shigeki (Hitachi JPX) Kaziwara Hisa, System using microprocessor address lines for coprocessor selection within a multi-coprocessor apparatus.
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  8. Larson Mikiel L. (St. Charles IL) Toy Wing N. (Glen Ellyn IL), Traffic load control arrangement and method for a packet switching system.
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이 특허를 인용한 특허 (52)

  1. Hymes, Charles; Broughton, Justin; McPartlan, Kevin; Pisupati, Chandra, Automatic management of the visual space while performing a task.
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  2. Ashmore, Paul Andrew; Davies, Ian Robert; Maine, Gene; Vedder, Rex Weldon, Certified memory-to-memory data transfer between active-active raid controllers.
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  3. Arimilli, Lakshminarayana B.; Drerup, Bernard C.; Joyner, Jody B.; Lecocq, Paul F.; Xue, Hanhong, Collective acceleration unit tree flow control and retransmit.
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  4. Schoeneberger,Carl; Broughton,Justin; Dimitroff,Michael P.; McPartian,Kevin; Hymes,Charles; Pisupati,Chandra, Contact center with normalized multiple protocol architecture.
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  5. Thomas A. Gregg ; Kulwant M. Pandey, Controlling the flow of information between senders and receivers across links being used as channels.
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  6. Elko, David A.; Goss, Steven N.; Jordan, Michael J.; Kurdt, Georgette L.; Nick, Jeffrey M.; Pushong, Kelly B.; Surman, David H., Controlling the state of duplexing of coupling facility structures.
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  7. Elko, David A.; Goss, Steven N.; Jordan, Michael J.; Kurdt, Georgette L.; Nick, Jeffrey M.; Pushong, Kelly B.; Surman, David H., Controlling the state of duplexing of coupling facility structures.
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  8. Elko, David A.; Goss, Steven N.; Jordan, Michael J.; Kurdt, Georgette L.; Nick, Jeffrey M.; Pushong, Kelly B.; Surman, David H., Controlling the state of duplexing of coupling facility structures.
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  9. Elko, David A.; Goss, Steven N.; Jordan, Michael J.; Kurdt, Georgette L.; Nick, Jeffrey M.; Pushong, Kelly B.; Surman, David H., Controlling the state of duplexing of coupling facility structures.
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  10. Avsan Oleg,SEX ; Wildling Klaus,SEX, Data processing system and method for accessing a common data memory.
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  11. Broughton, Justin; McPartlan, Kevin J.; Rodgers, Elizabeth; Rodgers, Robert S.; Covdy, Ivan; Ho, Roy; Kowalski, Carl Raymond; McCalmont, D. Thompson; Stine, Art, Digital multimedia contact center.
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  12. Broughton,Justin; McPartlan,Kevin J.; Rodgers,Elizabeth; Rodgers,Robert S.; Covdy,Ivan; Ho,Roy; Kowalski,Carl Raymond; McCalmont,D. Thompson; Stine,Art, Digital multimedia contact center with tier escalation and deescalation in response to changed criteria.
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  13. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, Direct/indirect transmission of information using a multi-tiered full-graph interconnect architecture.
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  14. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Drerup, Bernard C.; Joyner, Jody B.; Lewis, Jerry D., Dynamic routing based on information of not responded active source requests quantity received in broadcast heartbeat signal and stored in local data structure for other processor chips.
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  15. Venkatsubramanian, Narayan; Dontje, Terry D.; Sistare, Steve, Efficient connection and memory management for message passing on a single SMP or a cluster of SMPs.
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  16. Gregg, Thomas A., Employing a data mover to communicate between dynamically selected zones of a central processing complex.
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  17. McPartlan, Kevin; Broughton, Justin, Escalated handling of non-realtime communications.
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  18. Gregg, Thomas A.; Pandey, Kulwant M., Extensions to coupling channels to support multiple coupling facility sharing, interrupts, and message passing.
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  19. Gregg,Thomas A.; Pandey,Kulwant M., Extensions to coupling channels to support multiple coupling facility sharing, interrupts, and message passing.
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  20. Schoeneberger, Carl; Broughton, Justin; Dimitroff, Michael P., High availability VoIP subsystem.
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  21. Schoeneberger,Carl; Broughton,Justin; Dimitroff,Michael P., High availability VoIP subsystem.
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  22. Shanahan,Patricia; Phelps,Andrew E.; Frick,Guy David, Inter-domain data transfer.
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  23. Moh Sang-Man,KRX ; Shin Sang-Seok,KRX ; Yoon Suk-Han,KRX, Message-passing multiprocessor system.
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  24. Bortolotto, Robert L.; Lau, Carmel Chi Him; Davis, Michael F.; Nie, Xiao Pin; Hillard, David A.; Goody, Steven H.; Terhune, Daniel Scott, Method and apparatus for automatically provisioning data circuits.
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  25. Bortolotto,Robert L.; Lau,Carmel Chi Him; Davis,Michael F.; Nie,Xiao Pin; Hillard,David A.; Goody,Steven H.; Terhune,Daniel Scott, Method and apparatus for automatically provisioning data circuits.
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  26. Ethier Steven L., Method and apparatus for automatically reducing cross-talk between wires coupled to a common network device.
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  27. Davies, Ian Robert; Pecone, Victor Key, Method for adopting an orphan I/O port in a redundant storage controller.
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  28. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan; Seminaro, Edward J.; Speight, William E., Method for data processing using a multi-tiered full-graph interconnect architecture.
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  29. Golding Richard A., Method for providing access protection for SCSI storage devices.
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  30. Gregg, Thomas A.; Pandey, Kulwant M., Method of controlling the flow of information between senders and receivers across links being used as channels.
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  31. Gregg, Thomas A.; Pandey, Kulwant M., Method of controlling the flow of information between senders and receivers across links being used as channels.
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  32. Ball Alan E.,GBX ; White David J.,GBX ; Haughton John D.,GBX, Multi-processor computer system having memory space accessible to multiple processors.
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  33. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, Packet coalescing in virtual channels of a data processing system in a multi-tiered full-graph interconnect architecture.
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  34. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Drerup, Bernard C.; Joyner, Jody B.; Lewis, Jerry D., Performing dynamic request routing based on broadcast queue depths.
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  35. Autechaud Jean-Francois,FRX ; Dionet Christophe,FRX, Process and system for initializing a serial link between two integrated circuits comprising a parallel-serial port using two clocks with different frequencies.
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  36. Suzuki Shigeo,JPX, Processing method, apparatus and system for memory management using shared memories with common data areas.
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  37. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, Providing a fully non-blocking switch in a supernode of a multi-tiered full-graph interconnect architecture.
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  38. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, Providing reliability of communication between supernodes of a multi-tiered full-graph interconnect architecture.
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  39. Ashmore, Paul Andrew, Redundant storage controller system with enhanced failure analysis capability.
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  40. Schoeneberger,Carl, Remote agent access method to a VoIP contact center where high QoS is not supported.
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  41. Davies, Ian Robert, Safe message transfers on PCI-Express link from RAID controller to receiver-programmable window of partner RAID controller CPU memory.
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  42. Schoeneberger,Carl, Scheduled return to queue with priority (SRQP).
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  43. Skoog Frederick H., Signaling network gateway device and method for use in a signaling network.
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  44. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, System and method for dynamically supporting indirect routing within a multi-tiered full-graph interconnect architecture.
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  45. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, System and method for handling indirect routing of information between supernodes of a multi-tiered full-graph interconnect architecture.
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  46. Talluri, Madhusudhan; Khalidi, Yousef A., System and method for message transmission between network nodes connected by parallel links.
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  47. Talluri Madhusudhan ; Pease Marshall C., System and method for message transmission between network nodes using remote wires.
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  48. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, System and method for providing a high-speed message passing interface for barrier operations in a multi-tiered full-graph interconnect architecture.
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  49. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan, System and method for providing multiple redundant direct routes between supernodes of a multi-tiered full-graph interconnect architecture.
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  50. Davies, Ian Robert, System and method for sharing SATA drives in active-active RAID controller system.
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  51. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Rajamony, Ramakrishnan; Seminaro, Edward J.; Speight, William E., System for data processing using a multi-tiered full-graph interconnect architecture.
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  52. Arimilli, Lakshminarayana B.; Arimilli, Ravi K.; Drerup, Bernard C.; Joyner, Jody B.; Lewis, Jerry D., System for providing a cluster-wide system clock in a multi-tiered full-graph interconnect architecture.
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