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Device and method for forming and attaching an array of conductive balls

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B23K-035/14
출원번호 US-0390677 (1995-02-17)
발명자 / 주소
  • Rogren Philip E. (624 Silver Ave. Half Moon Bay CA 94019-1565)
인용정보 피인용 횟수 : 29  인용 특허 : 8

초록

A method and preform for forming and attaching an array of conductive balls, preferably solder balls, to ball receiving areas on a substrate is disclosed. The preform is a connected array of sub-preforms comprised of the conductive material from which the balls will be formed. The connections betwee

대표청구항

A preform of conductive material capable of being formed into a plurality of conductive balls for accurate and secure attachment to respective conductive ball receiving areas of a substrate, comprising in combination: (a) a substantially planar structure having an upper plane and a lower plane, said

이 특허에 인용된 특허 (8)

  1. Hitachi Yuzo (Shizuoka JPX) Takikawa Kazunori (Numazu JPX), High-efficiency metal-made carrier body for exhaust gas cleaning catalyst.
  2. Socha Paul A. (Whitesboro NY), Integrated preforms.
  3. Farquharson, Robert J.; Gerns, Stanton T., Interconnected solder pads and the method of soldering.
  4. Fukasawa Hideyuki (Hadano JPX) Kobayashi Mamoru (Hadano JPX) Wanami Masahiro (Hadano JPX), Method and apparatus for aligning solder balls.
  5. Bouley Jean Claude (Dole FR), Method and apparatus for soldering electric terminals to double-sided circuit boards.
  6. Wilson Howard P. (Austin TX) Martin Fonzell D. J. (Austin TX), Method for attaching conductive balls to a substrate.
  7. Seaman Ronald J. (Austin TX) Vanderlee Keith A. (Austin TX), Method of making a multipad solder preform.
  8. Reid Gilbert R. (Norristown PA), Multiple solder pre-form with non-fusible web.

이 특허를 인용한 특허 (29)

  1. Kilian, Robert; Kane, Kevin; Kabatsi, Chris, Architectural panel.
  2. Kilian, Robert; Kane, Kevin; Kabatsi, Chris, Architectural panel.
  3. Kilian, Robert; Kane, Kevin; Kabatsi, Chris, Architectural panel.
  4. Eun Chul Ahn KR; Woong Ky Ha KR; Young Min Lee KR, BGA package and method of manufacturing the same.
  5. Connie M. Wong ; Michael G. Lee, Conductive interconnect structures and methods for forming conductive interconnect structures.
  6. Fan, Chia-Wei; Wertz, Darrell, Electrical connector having reinforcement member attached to housing.
  7. Lee, Sang-hwan, Liquid crystal display modules and holding assemblies applied to the same.
  8. Alan G. Wood ; Salman Akram ; Mike Hess ; David R. Hembree, Method and apparatus for aligning and attaching balls to a substrate.
  9. Hertz Eric, Method and apparatus for placing conductive preforms.
  10. Freeman, Gary; Nowak, Jr., Thomas; Purcell, Thomas; Mirabito, A. Jason; Sullivan, Thomas M.; Foulke, Richard F.; Foulke, Jr., Richard F.; Ohlenbusch, Cord W., Method and apparatus for placing solder balls on a substrate.
  11. Herz, Enrico; Teich, Michael; Becker, Axel, Method and apparatus for the correction of defective solder bump arrays.
  12. Hertz Eric L., Method and apparatus using colored foils for placing conductive preforms.
  13. Lapastora James, Method for attaching spherical and/or non-spherical contacts to a substrate.
  14. Matsuda Shin,JPX ; Sato Shingo,JPX, Method of fabricating package for housing semiconductor element.
  15. Antao Joseph S., Method of forming ball grid array contacts.
  16. Inoue Kosuke,JPX ; Nishimura Asao,JPX ; Suzuki Takamichi,JPX ; Fujii Teru,JPX ; Morishima Masayuki,JPX ; Nakajima Yasuyuki,JPX ; Oroku Noriyuki,JPX, Method of forming bumps.
  17. Inoue, Kosuke; Nishimura, Asao; Suzuki, Takamichi; Fujii, Teru; Morishima, Masayuki; Nakajima, Yasuyuki; Oroku, Noriyuki, Method of forming bumps.
  18. Kosuke Inoue JP; Asao Nishimura JP; Takamichi Suzuki JP; Teru Fujii JP; Masayuki Morishima JP; Yasuyuki Nakajima JP; Noriyuki Oroku JP, Method of forming bumps.
  19. Matsushita, Takeshi; Mochizuki, Eiji; Nishizawa, Tatsuo; Saito, Shunsuke, Method of manufacturing a semiconductor device.
  20. Fisch, David Edward, Packaged microelectronic elements having blind vias for heat dissipation.
  21. Liu Dangrong Ronald, Reinforced solder preform.
  22. Chun Heung Sup,KRX, Semiconductor package and a method of manufacturing thereof.
  23. Foulke Richard F. ; Foulke ; Jr. Richard F. ; Ohlenbusch Cord W., Solder ball placement apparatus.
  24. Richard F. Foulke ; Richard F. Foulke, Jr. ; Cord W. Ohlenbusch, Solder ball placement apparatus.
  25. Foulke Richard F. ; Foulke ; Jr. Richard F. ; Ohlenbusch Cord W., Solder ball placement method.
  26. Pattanaik Surya ; Reiley Timothy C. ; Simmons Randall G., Solder balltape and method for making electrical connection between a head transducer and an electrical lead.
  27. Hartnett, Amanda M.; Socha, Paul, Solder preform.
  28. Makita Yoshio,JPX ; Yamaura Tatsuo,JPX ; Namikawa Mamoru,JPX ; Yoshimura Satoshi,JPX ; Honda Kenichi,JPX, Strut aligning fixture.
  29. Parks Jerry M. ; Hall ; Jr. Herbert L. ; Rusek ; Jr. Stanley J., Vacuum insulation vessels and methods of making same.
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