초록 ▼

Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly－composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and

Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly－composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins－can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.

대표청구항 ▼

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) forming at least one interconnect board of an electrically insulat

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions, including electrically conductive pads on a surface of the board, flat electrically conductive contacts on a bottom surface of the interconnect board, and electrically conductive pathways between selected pads and selected contacts; (b) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic with thermal expansion characteristics similar to that of the substrate of the interconnect board; (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board, by using a solder material that has a reflow temperature at least as high as 185°C.; and (d) soldering an integrated circuit to the electrically conductive pads of the interconnect board at a temperature less than the reflow temperature of the solder material specified in part (c).