이 특허를 인용한 특허 (55)

1. Enicks, Darwin Gene; Carver, Damian, Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization.

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2. Enicks,Darwin Gene; Carver,Damian, Bandgap engineered mono-crystalline silicon cap layers for SiGe HBT performance enhancement.

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3. Salmi, Abderrahmane, Bipolar device with silicon germanium (SiGe) base region.

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4. Kondo, Masao; Oda, Katsuya; Washio, Katsuyoshi, Bipolar transistor.

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5. Masao Kondo JP; Katsuya Oda JP; Katsuyoshi Washio JP, Bipolar transistor.

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6. Asai, Akira; Ohnishi, Teruhito; Takagi, Takeshi, Bipolar transistor and fabrication method thereof.

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7. Heinemann, Bernd; Ehwald, Karl-Ernst; Knoll, Dieter, Bipolar transistor and method for producing same.

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8. Karl-Ernst Ehwald DE; Bernd Tillack DE; Bernd Heinemann DE; Dieter Knoll DE; Dirk Wolansky DE, Bipolar transistor and method for producing same.

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9. Lachner,Rudolf, Bipolar transistor and method for producing the same.

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10. Asai, Akira; Ohnishi, Teruhito; Takagi, Takeshi, Bipolar transistor and method manufacture thereof.

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11. Khater,Marwan H.; Dunn,James S.; Harame,David L.; Joseph,Alvin J.; Liu,Qizhi; Pagette,Francois; St. Onge,Stephen A.; Stricker,Andreas D., Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same.

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12. Khater,Marwan H.; Dunn,James S.; Harame,David L.; Joseph,Alvin J.; Liu,Qizhi; Pagette,Francois; St. Onge,Stephen A.; Stricker,Andreas D., Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same.

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13. Matsuoka, Akio, Bipolar transistor including conductive first and second protection layers.

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14. Freeman, Gregory G.; Khater, Marwan H.; Pagette, Francois, Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same.

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15. Freeman, Gregory G.; Khater, Marwan H.; Pagette, Francois, Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same.

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16. Khater, Marwan H.; Pagette, Francois, Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide.

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17. Khater,Marwan H; Pagette,Francois, Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide.

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18. Freeman, Gregory G.; Greenberg, David R.; Jeng, Shwu-Jen, Dual sidewall spacer for a self-aligned extrinsic base in SiGe heterojunction bipolar transistors.

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19. Malladi, Ramana M.; Newton, Kim M., Flat response device structures for bipolar junction transistors.

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20. Ozkan, Cengiz S.; Salmi, Abderrahmane, Heterojunction bipolar transistor (HBT) fabrication using a selectively deposited silicon germanium (SiGe).

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21. Torvik, John Tarje; Pankove, Jacques Isaac, Heterojunction bipolar transistor containing at least one silicon carbide layer.

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22. Torvik, John Tarje; Pankove, Jacques Isaac, Heterojunction bipolar transistor containing at least one silicon carbide layer.

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23. Forbes Leonard ; Ahn Kie Y., Homojunction semiconductor devices with low barrier tunnel oxide contacts.

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24. Forbes,Leonard; Ahn,Kie Y., Homojunction semiconductor devices with low barrier tunnel oxide contacts.

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25. Chu, Jack Oon; Coolbaugh, Douglas Duane; Dunn, James Stuart; Greenberg, David R.; Harame, David L.; Jagannathan, Basanth; Johnson, Robb Allen; Lanzerotti, Louis D.; Schonenberg, Kathryn Turner; Wuthrich, Ryan Wayne, Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology.

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26. Chu, Jack Oon; Coolbaugh, Douglass Duane; Dunn, James Stuart; Greenberg, David R.; Harame, David L.; Jagannathan, Basanth; Johnson, Robb Allen; Lanzerotti, Louis D.; Schonenberg, Kathryn Turner; Wuth, Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology.

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27. Chu,Jack Oon; Coolbaugh,Douglas Duane; Dunn,James Stuart; Greenberg,David R.; Harame,David L.; Jagannathan,Basanth; Johnson,Robb Allen; Lanzerotti,Louis D.; Schonenberg,Kathryn Turner; Wuthrich,Ryan , Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology.

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28. Jack Oon Chu ; Douglas Duane Coolbaugh ; James Stuart Dunn ; David R. Greenberg ; David L. Harame ; Basanth Jagannathan ; Robb Allen Johnson ; Louis D. Lanzerotti ; Kathryn Turner Schonenberg, Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology.

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29. Wilson, Colin, Insulated gate field emitter array.

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30. Groves Robert A. ; Nguyen-Ngoc Dominique ; Jadus Dale K. ; Walter Keith M., Low noise, high frequency solid state diode.

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31. Hussain,Tahir, Method and apparatus for fabricating heterojunction bipolar transistors with simultaneous low base resistance and short base transit time.

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32. Enicks,Darwin Gene, Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement.

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33. Alain Chantre FR; Didier Dutartre FR; Helene Baudry FR, Method for fabricating a bipolar transistor of the self-aligned double-polysilicon type with a heterojunction base and corresponding transistor.

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34. Jagannathan, Basanth, Method for fabricating heterojunction bipolar transistors.

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35. Boulenc, Pierre, Method for manufacturing a vertical bipolar transistor compatible with CMOS manufacturing methods.

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36. Geiss, Peter J.; Joseph, Alvin J.; Krishnasamy, Rajendran; Liu, Xuefeng, Method of fabrication for SiGe heterojunction bipolar transistor (HBT).

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37. Robert A. Groves ; Dale K. Jadus ; Dominique L. Nguyen-Ngoc ; Keith M. Walter, Method of forming a microwave array transistor for low-noise and high-power applications.

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38. Terpstra Doede,NLX ; Emons Catharina H. H.,NLX, Method of manufacturing a semiconductor device with a bipolar transistor.

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39. Marty Michel,FRX ; Chantre Alain,FRX ; Schwartzmann Thierry,FRX, Method of selectively doping the intrinsic collector of a vertical bipolar transistor with epitaxial base.

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40. Groves, Robert A.; Jadus, Dale K.; Nguyen-Ngoc, Dominique L.; Walter, Keith M., Microwave array transistor for low-noise and high-power applications.

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41. Johnson, Frank Scott; Seitchik, Jerold A.; Soji, John, One mask PNP (or NPN) transistor allowing high performance.

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42. Klein, Wolfgang, Retrograde doped buried layer transistor and method for producing the same.

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43. Wilson, Colin, Robust field emitter array design.

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44. Furukawa, Toshiharu; Mandelman, Jack A.; Moy, Dan; Park, Byeongju; Tonti, William R., SOI hybrid structure with selective epitaxial growth of silicon.

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45. Chan, Kevin K.; Harame, David L.; Herrin, Russell T.; Liu, Qizhi, Self-aligned emitter-base in advanced BiCMOS technology.

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46. Chan, Kevin K.; Harame, David L.; Herrin, Russell T.; Liu, Qizhi, Self-aligned emitter-base in advanced BiCMOS technology.

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47. Schulze, Hans-Joachim; Niedernostheide, Franz Josef; Soelkner, Gerald, Semiconductor component with high concentration doped zone embedded in emitter region.

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48. Heinemann,Bernd; Knoll,Dieter; Ehwald,Karl Ernst; R��cker,Holger, Semiconductor device and method for production thereof.

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49. Katsumata Yasuhiro,JPX ; Yoshino Chihiro,JPX ; Inoh Kazumi,JPX, Semiconductor device having bipolar transistor with unique ratio of base gummel number to impurity concentration of coll.

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50. Kalnitsky, Alexander; Uppili, Sudarsan; Park, Sang, Semiconductor transistor having a polysilicon emitter and methods of making the same.

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51. Geiss,Peter J.; Joseph,Alvin J.; Krishnasamy,Rajendran; Liu,Xuefeng, SiGe heterojunction bipolar transistor (HBT).

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52. Ramdani, Jamal; Printy, Craig; Adler, Steven J.; Labonte, Andre P., System and method for providing a single deposition emitter/base in a bipolar junction transistor.

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53. Sjodin, H.ang.kan; Soderbarg, Anders, Trenched semiconductor device with high breakdown voltage.

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54. Marty Michel,FRX ; Chantre Alain,FRX ; Regolini Jorge,FRX, Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process.

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55. Marty, Michel; Chantre, Alain; Regolini, Jorge, Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process.

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