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Dual mode arbitration apparatus and method for reducing latency by allowing the possibility of simultaneous request and 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
출원번호 US-0551862 (1995-11-07)
발명자 / 주소
  • Cerauskis Frederick M. (Mountain View CA)
출원인 / 주소
  • Sun Microsystems, Inc. (Mountain View CA 02)
인용정보 피인용 횟수 : 44  인용 특허 : 4

초록

A method and apparatus for reducing arbitration latency. A fast mode is defined to allow simultaneous request and access to a shared resource. A slow mode is defined to require a request, followed by arbitration, followed by access to the resource. By dynamically switching between fast and slow mode

대표청구항

A method of reducing latency of bus arbitration comprising the steps of: switching between a fast and a slow arbitration state responsive to a number of devices requesting access to a bus during a predetermined time period; wherein fast arbitration includes: requesting access to the bus while simult

이 특허에 인용된 특허 (4)

  1. Nobuyuki Oba (Sendai JPX), Arbitration mechanism for an ATM switch.
  2. Flahive Barry J. (Westford MA) Grady ; III John J. (Woburn MA) Rado Peter J. (Acton MA), Arbitration scheme for a multiported shared functional device for use in multiprocessing systems.
  3. Simcoe Robert J. (Westborough MA) Thomas Robert E. (Hudson MA), Fast arbiter having easy scaling for large numbers of requesters, large numbers of resource types with multiple instance.
  4. Wall Alan T. (24291 Donner Ct. Laguna Niguel CA 92677), Modular muffler for motor vehicles.

이 특허를 인용한 특허 (44)

  1. Aybay Gunes ; Aggarwal Sandeep, Apparatus and method for controlling data, address, and enable buses within a microprocessor.
  2. Shanahan, Patricia; Phelps, Andrew E., Computer system employing multiple board sets and coherence schemes.
  3. Vaccaro, Joseph S.; Collins, Michael P., Devices with arbitrated interface busses, and methods of their operation.
  4. White, Theodore C.; Jayabharathi, Dinesh, Integrated memory controller.
  5. White, Theodore C.; Jayabharathi, Dinesh, Integrated memory controller.
  6. White,Theodore C.; Jayabharathi,Dinesh, Integrated memory controller.
  7. White,Theodore C.; Jayabharathi,Dinesh, Integrated memory controller.
  8. Purdham, David M.; Byers, Larry L.; Artz, Andrew, Interrupt controller for prioritizing interrupt requests in an embedded disk controller.
  9. Purdham,David M.; Byers,Larry L.; Artz,Andrew, Interrupt controller for processing fast and regular interrupts.
  10. Eberle,Hans; Gura,Nils; Fugier,Nicolas; Tourancheau,Bernard, Method and apparatus for speculative arbitration.
  11. Spaur, Michael R.; Sandoval, Raymond A., Method and system for automatic time base adjustment for disk drive servo controllers.
  12. Spaur,Michael R.; Sandoval,Raymond A., Method and system for automatic time base adjustment for disk drive servo controllers.
  13. Spaur,Michael R.; Sandoval,Raymond A., Method and system for collecting servo field data from programmable devices in embedded disk controllers.
  14. Spaur,Michael R.; Sandoval,Raymond A., Method and system for collecting servo field data from programmable devices in embedded disk controllers.
  15. Byers,Larry L.; Ricci,Paul B.; Kriscunas,Joseph G.; Desubijana,Joseba M.; Robeck,Gary R.; Spaur,Michael R.; Purdham,David M., Method and system for embedded disk controllers.
  16. Spaur, Michael R.; Sandoval, Raymond A., Method and system for head position control in embedded disk drive controllers.
  17. Spaur,Michael R.; Sandoval,Raymond A., Method and system for head position control in embedded disk drive controllers.
  18. Spaur,Michael R.; Sandoval,Raymond A., Method and system for head position control in embedded disk drive controllers.
  19. Perozo, Angel G.; Dennin, William W., Method and system for processing frames in storage controllers.
  20. Perozo, Angel G.; Dennin, William W., Method and system for processing frames in storage controllers.
  21. Pinvidic, Daniel R.; Datwyler, Wayne C.; Hudiono, Hunardi, Method and system for read gate timing control for storage controllers.
  22. Pinvidic, Daniel R; Datwyler, Wayne C.; Hudiono, Hunardi, Method and system for read gate timing control for storage controllers.
  23. Spaur, Michael R.; Kim, Ihn, Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers.
  24. Spaur,Michael R.; Kim,Ihn, Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers.
  25. Byers, Larry L.; Desubijana, Joseba M.; Robeck, Gary R.; Dutton, Fredarico E., Method and system for using an external bus controller in embedded disk controllers.
  26. Byers,Larry L.; Desubijana,Joseba M.; Robeck,Gary R.; Dutton,Fredarico E., Method and system for using an external bus controller in embedded disk controllers.
  27. Krantz, Leon A.; Campbell, Frank W., Methods and systems for arbitrating access to a disk controller buffer memory by allocating various amounts of times to different accessing units.
  28. Perozo, Angel G.; White, Theodore C.; Dennin, William W.; Cruz, Aurelio J., Power save module for storage controllers.
  29. Perozo,Angel G.; White,Theodore C.; Dennin,William W.; Cruz,Aurelio J., Power save module for storage controllers.
  30. Byers, Larry L.; Purdham, David M.; Spaur, Michael R., Servo controller interface module for embedded disk controllers.
  31. Providenza, John R., Shared resource arbitration method and apparatus.
  32. Krantz, Leon A.; Nguyen, Kha; North, Michael J., Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device.
  33. Krantz, Leon A.; Nguyen, Kha; North, Michael J., Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device.
  34. White,Theodore C.; Dennin,William W.; Perozo,Angel G., System and method for concatenating data.
  35. Jayabharathi, Dinesh, System and method for conducting BIST operations.
  36. Jayabharathi,Dinesh, System and method for conducting BIST operations.
  37. Nguyen, Kha; Wong, William C.; Jang, Mouluan; Wang, Jane X., System and method for controlling buffer memory overflow and underflow conditions in storage controllers.
  38. White,Theodore C.; Dennin,William W.; Perozo,Angel G., System and method for padding data blocks and/or removing padding from data blocks in storage controllers.
  39. Ricci,Paul B., System and method for performing parity checks in disk storage system.
  40. Ricci, Paul B., System and method for performing parity checks in disk storage systems.
  41. White, Theodore C.; Dennin, William W.; Perozo, Angel G., System and method for reading and writing data using storage controllers.
  42. White, Theodore C.; Dennin, William W.; Perozo, Angel G., System and method for transferring data in storage controllers.
  43. Nguyen, Huy T.; Krantz, Leon A.; Dennin, William W., System and method for transmitting data in storage controllers.
  44. Jayabharathi, Dinesh; Dennin, William W., System and method for using TAP controllers.
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