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Method for electroplating a substrate containing an electroplateable pattern 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C25D-005/02
출원번호 US-0994687 (1992-12-22)
발명자 / 주소
  • Svendsen Leo Gulvad (Redwood City CA) Walker Clifford James (Fremont CA) Lykins
  • II James Leborn (San Jose CA)
출원인 / 주소
  • ELF Technologies, Inc. (Foster City CA 02)
인용정보 피인용 횟수 : 42  인용 특허 : 0

초록

A method for the electroplating of conductive metal onto a substrate containing at least one hole and an electroplateable surface which is conducive to subsequent metal deposition comprises placing the substrate in close proximity to an electrode but such that there is no substantial electrical cont

대표청구항

A method for the deposition of a conductive metal onto a substrate comprising: (a) providing a substrate comprising a dielectric material and having an electroplateable pattern on a surface thereof; wherein said electroplateable pattern comprises a material which is conducive to the subsequent depos

이 특허를 인용한 특허 (42)

  1. Bradley Jean-Claude, Bipolar electrochemical connection of materials.
  2. Lochun, Darren; Ireland, John J., Circuit elements having an embedded conductive trace and methods of manufacture.
  3. Brown Harold M., Clay-containing textile material treating composition and method.
  4. Morris George W,GBX ; Treen Andrew S,GBX ; Grant Ian,GBX, Composite materials.
  5. Farrar Paul A., Copper metallurgy in integrated circuits.
  6. Farrar, Paul A., Copper metallurgy in integrated circuits.
  7. Farrar,Paul A., Electronic apparatus having a core conductive structure within an insulating layer.
  8. Deng, Tao; Arias, Francisco; Ismagilov, Rustem F.; Kenis, Paul J. A.; Whitesides, George M., Fabrication of metallic microstructures via exposure of photosensitive composition.
  9. Deng,Tao; Arias,Francisco; Ismagilov,Rustem F.; Kenis,Paul J. A.; Whitesides,George M., Fabrication of metallic microstructures via exposure of photosensitive composition.
  10. Deng, Tao; Arias, Francisco; Ismagilov, Rustem F.; Kenis, Paul J. A.; Whitesides, George M., Fabrication of metallic microstructures via exposure of photosensitive compostion.
  11. Farrar Paul A., Forming submicron integrated-circuit wiring from gold, silver, copper and other metals.
  12. Farrar Paul A., Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals.
  13. Farrar, Paul A., Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals.
  14. Farrar,Paul A., Hplasma treatment.
  15. Farrar, Paul A., Integrated circuit and seed layers.
  16. Farrar,Paul A., Integrated circuit and seed layers.
  17. Farrar,Paul A., Integrated circuit and seed layers.
  18. Farrar Paul A., Integrated circuit with oxidation-resistant polymeric layer.
  19. Farrar, Paul A., Mask on a polymer having an opening width less than that of the opening in the polymer.
  20. Farnworth, Warren M.; Duesman, Kevin G., Method and apparatus for electrolytic plating of surface metals.
  21. Ahn,Kie Y.; Forbes,Leonard, Method for making integrated circuits.
  22. Dubin, Valery, Method for making interconnects and diffusion barriers in integrated circuits.
  23. Carter, Kenneth Raymond; Hart, Mark Whitney; Hawker, Craig Jon; Scott, John Campbell, Method of forming metallized pattern.
  24. Ahn, Kie Y.; Forbes, Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  25. Ahn, Kie Y.; Forbes, Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  26. Ahn,Kie Y.; Forbes,Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  27. Ahn Kie Y. ; Forbes Leonard, Methods for making copper and other metal interconnections in integrated circuits.
  28. Ahn,Kie Y.; Forbes,Leonard, Methods for making copper and other metal interconnections in integrated circuits.
  29. Ahn,Kie Y.; Forbes,Leonard, Methods for making integrated-circuit wiring from copper, silver, gold, and other metals.
  30. Ahn,Kie Y.; Forbes,Leonard, Methods for making integrated-circuit wiring from copper, silver, gold, and other metals.
  31. Ahn,Kie Y.; Forbes,Leonard, Methods for making integrated-circuit wiring from copper, silver, gold, and other metals.
  32. Valery Dubin, Methods for making interconnects and diffusion barriers in integrated circuits.
  33. Ahn,Kie Y.; Forbes,Leonard; Eldridge,Jerome M., Multilevel copper interconnect with double passivation.
  34. Ahn,Kie Y.; Forbes,Leonard, Multilevel copper interconnects with low-k dielectrics and air gaps.
  35. Ahn,Kie Y.; Forbes,Leonard, Multilevel copper interconnects with low-k dielectrics and air gaps.
  36. Jean-Claude Bradley, Process of making bipolar electrodeposited catalysts and catalysts so made.
  37. Ahn,Kie Y.; Forbes,Leonard, Selective electroless-plated copper metallization.
  38. Farrar, Paul A., Structures and methods to enhance copper metallization.
  39. Farrar, Paul A., Structures and methods to enhance copper metallization.
  40. Farrar, Paul A., Structures and methods to enhance copper metallization.
  41. Farrar,Paul A., Structures and methods to enhance copper metallization.
  42. Farrar,Paul A., Structures and methods to enhance copper metallization.
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