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Package for electrical components having a molded structure with a port extending into the molded structure 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
  • H01L-031/0203
출원번호 US-0269254 (1994-06-30)
발명자 / 주소
  • Mahadevan Dave S. (Mesa AZ) Boughter D. Lawrence (Tempe AZ)
출원인 / 주소
  • Motorola, Inc. (Schaumburg IL 02)
인용정보 피인용 횟수 : 27  인용 특허 : 15

초록

A package for mounting electrical components and a method for making the package. A mold structure (50) is formed by encapsulating a portion of a leadframe (10) with a molding compound. Leads (23) project from one side of the mold structure and a portion of a tab (27) projects from another side of t

대표청구항

A package for electrical components, comprising: a support structure having a first side, a second side, and an electrical component receiving area, wherein the support structure comprises a molded structure having a cavity and a port extending through the molded structure and contacting the electri

이 특허에 인용된 특허 (15)

  1. Kumada Akira (Kanagawa JPX), Assembly packaging method for sensor elements.
  2. Henrickson David L. (Phoenix AZ) Kaiser John J. (Scottsdale AZ) Koehn William C. (Pollockshields PA GB6) Raven David P. (North Wales PA), Carrier structure integral with an electronic package and method of construction.
  3. Yamanaka Hideo (Kanagawa JPX), Charge-coupled device image sensor.
  4. Joiner ; Jr. Bennett A. (Austin TX), Drop-in heat sink package with window frame flag.
  5. Nambu Seigo (Tokyo JPX) Takei Shinji (Tokyo JPX) Okuaki Hiroshi (Tokyo JPX), Heat-resistant plastic semiconductor device.
  6. Coldren Daniel R. (Enola PA), Lead frame having integral terminal tabs.
  7. Keller Joseph R. (Harrisburg PA), Lead frame having integral terminal tabs.
  8. Meddles, Dennis, Lead frame structure.
  9. Burns Carmen D. (Austin TX), Lead-on-chip integrated circuit fabrication method.
  10. Anderson W. Kyle (Rockford IL) Hoppe Richard J. (Rockford IL) Durako ; Jr. William J. (Rockford IL) Metzler Mark (Davis IL) Hughes Lawrence (Rockford IL) Jackson Stephen E. (Rockford IL), Metal matrix composite semiconductor power switch assembly.
  11. Ohashi Koji (Saitama JPX), Method of mounting a tab type male terminal and an assembly of tab type male terminals.
  12. Hamzehdoost Ahmad (Sacramento CA) Mora Leonard L. (San Jose CA), Package structure having accessible chip.
  13. Yamaji Yasuhiro (Kawasaki JPX) Takahashi Kenji (Yokohama JPX) Hirata Seiichi (Yokosuka JPX) Sakurai Toshiharu (Yokohama JPX), Semiconductor device.
  14. Yamazaki Shunpei (Tokyo JPX), Semiconductor device having a film-covered packaged component.
  15. Waldner Kurt (12260 Saraglen Dr. Saratoga CA 95070), Semiconductor lead frame.

이 특허를 인용한 특허 (27)

  1. Chiang, Cheng-Feng, Carrying structure of semiconductor.
  2. Waitl, Gunter; Brunner, Herbert, Diode housing.
  3. Waitl, Gunther; Brunner, Herbert, Diode housing.
  4. Waitl,Gunther; Brunner,Herbert, Diode housing.
  5. Waitl,Gunther; Brunner,Herbert, Diode housing.
  6. Waitl,Gunther; Brunner,Herbert, Diode housing.
  7. Loibl, Josef; Smirra, Karl, Electronic housing.
  8. Guarneros Jones, Johnathan; Kothamasa, Ravi Kiran, Electronics enclosure.
  9. Silverbrook, Kia, Inkjet device encapsulated at the wafer scale.
  10. Badehi, Avner, Integrated circuit device.
  11. Lee, Lee Han Meng@Eugene; Aziz, Anis Fauzi bin Abdul; Ling, Susan Goh Geok; Tiang, Ng Swee, Integrated circuit module with dual leadframe.
  12. Kim, Sun Dong, Lead frame and bottom lead semiconductor package using the lead frame.
  13. Yasunaga, Shoshi; Sugimoto, Jun, Lead frame for a semiconductor device and method of manufacturing a semiconductor device.
  14. Kim Dong You,KRX ; Kang Teck Gyu,KRX, Lead frame structure having non-removable dam bars for semiconductor package.
  15. Lee, Lee Han Meng@Eugene; Aziz, Anis Fauzi bin Abdul; Ling, Susan Goh Geok; Tiang, Ng Swee, Making an integrated circuit module with dual leadframes.
  16. Vasquez Armando C., Method for manufacturing multi-chip modules utilizing direct lead attach.
  17. Kondo Youichi,JPX ; Suzuki Masataka,JPX ; Watanabe Yasuyuki,JPX, Mounting structure for a relay arranged on a printed circuit board.
  18. Montiel, Frank, Package and method for making an underfilled integrated circuit.
  19. Caletka, David V.; Carper, James L.; Cincotta, John P.; Horsford, Kibby B.; Irish, Gary H.; Lajza, Jr., John J.; Osborne, Jr., Gordon C.; Ramsey, Charles R.; Smith, Robert M.; Vadnais, Michael J., Planarized plastic package modules for integrated circuits.
  20. Gottwald, Thomas, Printed circuit board with cavity.
  21. Shoji,Hiroyuki, Resin-molded package with cavity structure.
  22. Hart ; Jr. John W. ; McDonald William G. ; Wallace ; Jr. Daniel John, Saddle bracket for solid state pressure gauge.
  23. Takeda, Itaru; Kato, Tomoyuki; Shoji, Yasuo, Secondary battery protecting module and lead mounting method.
  24. Bauer, Michael; Haimerl, Alfred; Kessler, Angela; Mahler, Joachim; Schober, Wolfgang, Semiconductor device having a sensor chip, and method for producing the same.
  25. Farnworth Warren M. ; Hembree David R. ; Gochnour Derek ; Akram Salman ; Jacobson John O. ; Wark James M. ; Thummel Steven G., Semiconductor package with pre-fabricated cover.
  26. Tsuji, Koji; Sanagawa, Yoshiharu; Kirihara, Masao; Gouda, Kazuo; Nishijima, Youichi, Sensor device, sensor system and methods for manufacturing them.
  27. Chiu, Anthony M., Surface mount package for linear array sensors.
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