초록 ▼

An intermediate potential setting circuit includes two MOS transistors having different conductivity types and connected in series between reference power supplies, first and second gate control units, respectively connected to gates of the transistors, for separately ON/OFF-controlling the transist

An intermediate potential setting circuit includes two MOS transistors having different conductivity types and connected in series between reference power supplies, first and second gate control units, respectively connected to gates of the transistors, for separately ON/OFF-controlling the transistors, a load capacitor connected between the connection node of the transistors and one of the reference power supplies, a control unit, connected between the connection node and the first and second gate control units, for feeding back a potential of the connection node to the first and second gate control units to selectively perform control to turn on the transistors, an external control unit for externally supplying a control signal to the first and second gate control units, and an output terminal, connected to the connection node, for extracting an intermediate potential output as a potential of the load capacitor.

대표청구항 ▼

An intermediate potential setting circuit comprising: n-and p-channel MOS transistors connected in series between first and second reference power supplies, the first reference power supply connected to the n-channel MOS transistor being higher in potential than the second reference power supply con

An intermediate potential setting circuit comprising: n-and p-channel MOS transistors connected in series between first and second reference power supplies, the first reference power supply connected to the n-channel MOS transistor being higher in potential than the second reference power supply connected to the p-channel MOS transistor; first and second gate control means, respectively connected to gates of said n- and p-channel MOS transistors, for separately ON/OFF controlling said n- and p-channel MOS transistors; a load capacitor connected between a connection node of said n- and p-channel MOS transistors and said second reference power supply; control means, connected between the connection node and said first and second gate control means to selectively perform control to turn on said n- and p-channel MOS transistors; external control means for externally supplying a control signal to said first and second gate control means; and an output terminal, connected to the connection node, for extracting an intermediate potential output as a potential of said load capacitor.