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Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/34
  • H01L-023/06
출원번호 US-0684715 (1996-07-22)
발명자 / 주소
  • Wojnarowski Robert John (Ballston Lake NY) Gorczyca Thomas Bert (Schenectady NY)
출원인 / 주소
  • General Electric Company (Schenectady NY 02)
인용정보 피인용 횟수 : 134  인용 특허 : 11

초록

First and second flexible interconnect structures are provided and each includes a flexible interconnect layer and a chip with a surface having chip pads attached to the flexible interconnect layer. Molding material is inserted between the flexible interconnect layers for encapsulating the respectiv

대표청구항

A two-sided molded circuit module with flexible interconnect layers, the module comprising: first and second flexible interconnect structures, each flexible interconnect structure comprising a flexible interconnect layer having a chip surface and at least one chip with chip pads attached to the chip

이 특허에 인용된 특허 (11)

  1. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  2. Wojnarowski Robert J. (Ballston Lake NY) Eichelberger Charles W. (Schenectady NY), Epoxy/polyimide copolymer blend dielectric and layered circuits incorporating it.
  3. Jacobs Scott L. (Apex NC), Extended integration semiconductor structure with wiring layers.
  4. Eichelberger Charles W. (Schenectady NY) Kornrumpf William P. (Albany NY) Wojnarowski Robert J. (Ballston Lake NY), Flexible high density interconnect structure and flexibly interconnected system.
  5. Fillion Raymond A. (Niskayuna NY) Wojnarowski Robert J. (Ballston Lake NY), Integral power and ground structure for multi-chip modules.
  6. Eichelberger Charles W. (Schenectady NY) Wojnarowski Robert J. (Ballston Lake NY) Welles ; II Kenneth B. (Scotia NY), Laser beam scanning method for forming via holes in polymer materials.
  7. Fillion Raymond A. (Niskayuna NY) Wojnarowski Robert J. (Ballston Lake NY) Gdula Michael (Knox NY) Cole Herbert S. (Burnt Hills NY) Wildi Eric J. (Niskayuna NY) Daum Wolfgang (Schenectady NY), Method for fabricating an integrated circuit module.
  8. Eichelberger Charles W. (Schenectady NY) Wojnarowski Robert J. (Ballston Lake NY) Welles ; II Kenneth B. (Schenectady NY), Method for packaging integrated circuit chips employing a polymer film overlay layer.
  9. Jacobs Scott L. (Apex NC), Method of making a extended integration semiconductor structure.
  10. Eichelberger Charles W. (Schenectady NY) Wojnarowski Robert J. (Ballston Lake NY), Multichip integrated circuit packaging configuration and method.
  11. Kishida Satoru (Itami JPX), Semiconductor integrated circuit device.

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