Circuitry that detects a phase difference between a first, base, clock and a second, derivative, clock derived from the
IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0652700
(1996-05-30)
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발명자
/ 주소 |
- Grewal Harsimran S. (San Francisco CA) Yang Lawrence R. (Palo Alto CA)
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출원인 / 주소 |
- Sun Microsystems, Inc. (Mountain View CA 02)
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인용정보 |
피인용 횟수 :
3 인용 특허 :
5 |
초록
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A phase detection circuit detects a phase relationship between a first clock signal, characterized by transitions of a given polarity (e.g., rising edges) at a first frequency, and a second clock signal, characterized by transitions of the given polarity at a second frequency that is an integer mult
A phase detection circuit detects a phase relationship between a first clock signal, characterized by transitions of a given polarity (e.g., rising edges) at a first frequency, and a second clock signal, characterized by transitions of the given polarity at a second frequency that is an integer multiple of the first frequency. Transition indication circuitry generates a transition indication signal responsive to transitions, of the given polarity, of the second clock signal. The transition indication signal includes a transition indication (e.g., a pulse) corresponding to each nth transition, of the given polarity, of the second clock signal and at a phase that is selectable relative to the first clock signal in response to a transition indication control signal. Sampling circuitry (e.g., one or more latches) samples the transition indication signal responsive to each transition, of the given polarity, of the first clock signal to generate a transition indication sample. Coincidence determination circuitry determines, responsive to the transition indication sample signal and to the second clock signal, if the transition indication coincides with a transition, of the given polarity, of the second clock signal. Transition indication control circuitry generates the transition indication control signal responsive to the determination by the coincidence determination circuitry. The transition indications of the transition indication signal, when the transition indication signal is at a steady state, provides an indication of the phase relationship between the first clock signal and the second clock signal.
대표청구항
▼
A phase detection circuit for detecting a phase relationship between a slow clock signal, characterized by transitions of a given polarity at a first frequency, and a fast clock signal, characterized by transitions of the given polarity at a second frequency that is an integer multiple of the first
A phase detection circuit for detecting a phase relationship between a slow clock signal, characterized by transitions of a given polarity at a first frequency, and a fast clock signal, characterized by transitions of the given polarity at a second frequency that is an integer multiple of the first frequency, comprising: transition indication circuitry that generates a transition indication signal responsive to transitions, of the given polarity, of the fast clock signal, the transition indication signal including a transition indication corresponding to each nth transition of the given polarity, of the fast clock signal and at a phase that is selectable relative to the slow clock signal in response to a transition indication control signal; sampling circuitry that samples the transition indication signal responsive to each transition, of the given polarity, of the slow clock signal to generate a transition indication sample; coincidence determination circuitry, responsive to the transition indication sample signal and to the fast clock signal, that determines if the transition indication coincides with a transition, of the given polarity, of the fast clock signal; transition indication control circuitry, responsive to the determination by the coincidence determination circuitry and to the fast clock signal that generates the transition indication control signal; and phase relationship indication circuitry that provides an indication of the phase relationship between the slow clock signal and the fast clock signal responsive to the transition indication control signal.
이 특허에 인용된 특허 (5)
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Avins, Jeremiah Y.; Phillion, Donald W., Circuit for detecting phase relationship between two signals.
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Thornton Roger D. (St. Marys OH), Duty cycle independent phase detector.
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Jackson Frederick E. (Apalachin) Letner Bernard J. (Johnson City) Nguyen Nhiem T. (Endicott NY), High speed digital clock synchronizer.
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DeLong Steven T. (Woodridge IL), Interface circuit, system and method for interfacing an electronic device and a synchronous state machine having differe.
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Nukui Yoshihiro (Gyoda JPX), Phase detector.
이 특허를 인용한 특허 (3)
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Nix,Michael A., Approach for adjusting the phase of channel-bonded data.
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Sander Wendell, Digital phase discriminations based on frequency sampling.
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Sharma,Anup K.; Krishnaswamy,Venkatram, Method for generating a synchronization signal based on the clock ratio between two clock domains for data transfer between the domains.
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